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ARM: fix thumb1 nop decoding

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In thumb1, NOP is a pseudo-instruction equivalent to mov r8, r8.
However the disassembler should not use this alias.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184703 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Amaury de la Vieuville
2013-06-24 09:11:53 +00:00
parent ff08da15cf
commit 4ee72398a1
4 changed files with 4 additions and 19 deletions
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lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
-9
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@@ -243,15 +243,6 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
return;
}
// Thumb1 NOP
if (Opcode == ARM::tMOVr && MI->getOperand(0).getReg() == ARM::R8 &&
MI->getOperand(1).getReg() == ARM::R8) {
O << "\tnop";
printPredicateOperand(MI, 2, O);
printAnnotation(O, Annot);
return;
}
// Combine 2 GPRs from disassember into a GPRPair to match with instr def.
// ldrexd/strexd require even/odd GPR pair. To enforce this constraint,
// a single GPRPair reg operand is used in the .td file to replace the two