mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2026-04-26 12:20:42 +00:00
Factor out more instruction scheduler code to the base class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25532 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
@@ -21,32 +21,8 @@
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include <iostream>
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#include <ios>
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#include <algorithm>
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using namespace llvm;
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namespace {
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// Style of scheduling to use.
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enum ScheduleChoices {
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noScheduling,
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simpleScheduling,
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simpleNoItinScheduling
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};
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} // namespace
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cl::opt<ScheduleChoices> ScheduleStyle("sched",
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cl::desc("Choose scheduling style"),
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cl::init(noScheduling),
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cl::values(
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clEnumValN(noScheduling, "none",
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"Trivial emission with no analysis"),
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clEnumValN(simpleScheduling, "simple",
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"Minimize critical path and maximize processor utilization"),
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clEnumValN(simpleNoItinScheduling, "simple-noitin",
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"Same as simple except using generic latency"),
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clEnumValEnd));
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namespace {
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//===----------------------------------------------------------------------===//
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///
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@@ -212,10 +188,6 @@ public:
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///
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class ScheduleDAGSimple : public ScheduleDAG {
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private:
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unsigned NodeCount; // Number of nodes in DAG
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bool HasGroups; // True if there are any groups
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NodeInfo *Info; // Info for nodes being scheduled
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NIVector Ordering; // Emit ordering of nodes
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ResourceTally<unsigned> Tally; // Resource usage tally
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unsigned NSlots; // Total latency
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static const unsigned NotFound = ~0U; // Search marker
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@@ -223,10 +195,9 @@ private:
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public:
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// Ctor.
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ScheduleDAGSimple(SelectionDAG &dag, MachineBasicBlock *bb,
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const TargetMachine &tm)
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: ScheduleDAG(dag, bb, tm),
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NodeCount(0), HasGroups(false), Info(NULL), Tally(), NSlots(0) {
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ScheduleDAGSimple(SchedHeuristics hstc, SelectionDAG &dag,
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MachineBasicBlock *bb, const TargetMachine &tm)
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: ScheduleDAG(hstc, dag, bb, tm), Tally(), NSlots(0) {
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assert(&TII && "Target doesn't provide instr info?");
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assert(&MRI && "Target doesn't provide register info?");
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}
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@@ -234,29 +205,18 @@ public:
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virtual ~ScheduleDAGSimple() {};
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private:
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static bool isFlagDefiner(SDNode *A);
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static bool isFlagUser(SDNode *A);
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static bool isDefiner(NodeInfo *A, NodeInfo *B);
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static bool isPassiveNode(SDNode *Node);
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void IncludeNode(NodeInfo *NI);
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void VisitAll();
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void Schedule();
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void IdentifyGroups();
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void GatherSchedulingInfo();
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void FakeGroupDominators();
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void PrepareNodeInfo();
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bool isStrongDependency(NodeInfo *A, NodeInfo *B);
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bool isWeakDependency(NodeInfo *A, NodeInfo *B);
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void ScheduleBackward();
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void ScheduleForward();
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void EmitAll();
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void printChanges(unsigned Index);
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void printSI(std::ostream &O, NodeInfo *NI) const;
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void print(std::ostream &O) const;
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};
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//===----------------------------------------------------------------------===//
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/// Special case itineraries.
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///
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@@ -275,103 +235,12 @@ static InstrStage IntStage = { 2, RSInteger };
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static InstrStage FloatStage = { 3, RSFloat };
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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} // namespace
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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/// Add - Adds a definer and user pair to a node group.
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///
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void NodeGroup::Add(NodeInfo *D, NodeInfo *U) {
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// Get current groups
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NodeGroup *DGroup = D->Group;
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NodeGroup *UGroup = U->Group;
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// If both are members of groups
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if (DGroup && UGroup) {
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// There may have been another edge connecting
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if (DGroup == UGroup) return;
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// Add the pending users count
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DGroup->addPending(UGroup->getPending());
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// For each member of the users group
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NodeGroupIterator UNGI(U);
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while (NodeInfo *UNI = UNGI.next() ) {
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// Change the group
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UNI->Group = DGroup;
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// For each member of the definers group
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NodeGroupIterator DNGI(D);
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while (NodeInfo *DNI = DNGI.next() ) {
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// Remove internal edges
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DGroup->addPending(-CountInternalUses(DNI, UNI));
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}
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}
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// Merge the two lists
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DGroup->group_insert(DGroup->group_end(),
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UGroup->group_begin(), UGroup->group_end());
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} else if (DGroup) {
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// Make user member of definers group
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U->Group = DGroup;
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// Add users uses to definers group pending
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DGroup->addPending(U->Node->use_size());
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// For each member of the definers group
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NodeGroupIterator DNGI(D);
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while (NodeInfo *DNI = DNGI.next() ) {
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// Remove internal edges
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DGroup->addPending(-CountInternalUses(DNI, U));
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}
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DGroup->group_push_back(U);
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} else if (UGroup) {
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// Make definer member of users group
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D->Group = UGroup;
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// Add definers uses to users group pending
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UGroup->addPending(D->Node->use_size());
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// For each member of the users group
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NodeGroupIterator UNGI(U);
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while (NodeInfo *UNI = UNGI.next() ) {
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// Remove internal edges
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UGroup->addPending(-CountInternalUses(D, UNI));
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}
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UGroup->group_insert(UGroup->group_begin(), D);
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} else {
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D->Group = U->Group = DGroup = new NodeGroup();
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DGroup->addPending(D->Node->use_size() + U->Node->use_size() -
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CountInternalUses(D, U));
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DGroup->group_push_back(D);
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DGroup->group_push_back(U);
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}
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}
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/// CountInternalUses - Returns the number of edges between the two nodes.
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///
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unsigned NodeGroup::CountInternalUses(NodeInfo *D, NodeInfo *U) {
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unsigned N = 0;
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for (unsigned M = U->Node->getNumOperands(); 0 < M--;) {
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SDOperand Op = U->Node->getOperand(M);
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if (Op.Val == D->Node) N++;
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}
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return N;
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}
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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/// isFlagDefiner - Returns true if the node defines a flag result.
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bool ScheduleDAGSimple::isFlagDefiner(SDNode *A) {
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unsigned N = A->getNumValues();
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return N && A->getValueType(N - 1) == MVT::Flag;
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}
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/// isFlagUser - Returns true if the node uses a flag result.
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///
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bool ScheduleDAGSimple::isFlagUser(SDNode *A) {
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unsigned N = A->getNumOperands();
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return N && A->getOperand(N - 1).getValueType() == MVT::Flag;
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}
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/// isDefiner - Return true if node A is a definer for B.
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///
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bool ScheduleDAGSimple::isDefiner(NodeInfo *A, NodeInfo *B) {
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@@ -391,19 +260,6 @@ bool ScheduleDAGSimple::isDefiner(NodeInfo *A, NodeInfo *B) {
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return false;
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}
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/// isPassiveNode - Return true if the node is a non-scheduled leaf.
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///
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bool ScheduleDAGSimple::isPassiveNode(SDNode *Node) {
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if (isa<ConstantSDNode>(Node)) return true;
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if (isa<RegisterSDNode>(Node)) return true;
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if (isa<GlobalAddressSDNode>(Node)) return true;
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if (isa<BasicBlockSDNode>(Node)) return true;
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if (isa<FrameIndexSDNode>(Node)) return true;
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if (isa<ConstantPoolSDNode>(Node)) return true;
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if (isa<ExternalSymbolSDNode>(Node)) return true;
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return false;
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}
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/// IncludeNode - Add node to NodeInfo vector.
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///
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void ScheduleDAGSimple::IncludeNode(NodeInfo *NI) {
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@@ -432,62 +288,6 @@ void ScheduleDAGSimple::IncludeNode(NodeInfo *NI) {
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NI->setPending(Count);
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}
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/// VisitAll - Visit each node breadth-wise to produce an initial ordering.
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/// Note that the ordering in the Nodes vector is reversed.
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void ScheduleDAGSimple::VisitAll() {
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// Add first element to list
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NodeInfo *NI = getNI(DAG.getRoot().Val);
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if (NI->isInGroup()) {
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Ordering.push_back(NI->Group->getDominator());
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} else {
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Ordering.push_back(NI);
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}
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// Iterate through all nodes that have been added
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for (unsigned i = 0; i < Ordering.size(); i++) { // note: size() varies
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// Visit all operands
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NodeGroupOpIterator NGI(Ordering[i]);
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while (!NGI.isEnd()) {
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// Get next operand
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SDOperand Op = NGI.next();
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// Get node
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SDNode *Node = Op.Val;
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// Ignore passive nodes
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if (isPassiveNode(Node)) continue;
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// Check out node
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IncludeNode(getNI(Node));
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}
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}
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// Add entry node last (IncludeNode filters entry nodes)
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if (DAG.getEntryNode().Val != DAG.getRoot().Val)
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Ordering.push_back(getNI(DAG.getEntryNode().Val));
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// Reverse the order
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std::reverse(Ordering.begin(), Ordering.end());
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}
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/// IdentifyGroups - Put flagged nodes into groups.
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///
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void ScheduleDAGSimple::IdentifyGroups() {
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for (unsigned i = 0, N = NodeCount; i < N; i++) {
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NodeInfo* NI = &Info[i];
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SDNode *Node = NI->Node;
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// For each operand (in reverse to only look at flags)
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for (unsigned N = Node->getNumOperands(); 0 < N--;) {
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// Get operand
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SDOperand Op = Node->getOperand(N);
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// No more flags to walk
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if (Op.getValueType() != MVT::Flag) break;
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// Add to node group
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NodeGroup::Add(getNI(Op.Val), NI);
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// Let evryone else know
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HasGroups = true;
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}
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}
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}
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/// GatherSchedulingInfo - Get latency and resource information about each node.
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///
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void ScheduleDAGSimple::GatherSchedulingInfo() {
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@@ -501,7 +301,7 @@ void ScheduleDAGSimple::GatherSchedulingInfo() {
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SDNode *Node = NI->Node;
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// If there are itineraries and it is a machine instruction
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if (InstrItins.isEmpty() || ScheduleStyle == simpleNoItinScheduling) {
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if (InstrItins.isEmpty() || Heuristic == simpleNoItinScheduling) {
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// If machine opcode
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if (Node->isTargetOpcode()) {
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// Get return type to guess which processing unit
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@@ -572,6 +372,41 @@ void ScheduleDAGSimple::GatherSchedulingInfo() {
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}
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}
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/// VisitAll - Visit each node breadth-wise to produce an initial ordering.
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/// Note that the ordering in the Nodes vector is reversed.
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void ScheduleDAGSimple::VisitAll() {
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// Add first element to list
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NodeInfo *NI = getNI(DAG.getRoot().Val);
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if (NI->isInGroup()) {
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Ordering.push_back(NI->Group->getDominator());
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} else {
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Ordering.push_back(NI);
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}
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// Iterate through all nodes that have been added
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for (unsigned i = 0; i < Ordering.size(); i++) { // note: size() varies
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// Visit all operands
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NodeGroupOpIterator NGI(Ordering[i]);
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while (!NGI.isEnd()) {
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// Get next operand
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SDOperand Op = NGI.next();
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// Get node
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SDNode *Node = Op.Val;
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// Ignore passive nodes
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if (isPassiveNode(Node)) continue;
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// Check out node
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IncludeNode(getNI(Node));
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}
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}
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// Add entry node last (IncludeNode filters entry nodes)
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if (DAG.getEntryNode().Val != DAG.getRoot().Val)
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Ordering.push_back(getNI(DAG.getEntryNode().Val));
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// Reverse the order
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std::reverse(Ordering.begin(), Ordering.end());
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}
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/// FakeGroupDominators - Set dominators for non-scheduling.
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///
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void ScheduleDAGSimple::FakeGroupDominators() {
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@@ -588,26 +423,6 @@ void ScheduleDAGSimple::FakeGroupDominators() {
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}
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}
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/// PrepareNodeInfo - Set up the basic minimum node info for scheduling.
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///
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void ScheduleDAGSimple::PrepareNodeInfo() {
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// Allocate node information
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Info = new NodeInfo[NodeCount];
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unsigned i = 0;
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for (SelectionDAG::allnodes_iterator I = DAG.allnodes_begin(),
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E = DAG.allnodes_end(); I != E; ++I, ++i) {
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// Fast reference to node schedule info
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NodeInfo* NI = &Info[i];
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// Set up map
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Map[I] = NI;
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// Set node
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NI->Node = I;
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// Set pending visit count
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NI->setPending(I->use_size());
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}
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}
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/// isStrongDependency - Return true if node A has results used by node B.
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/// I.E., B must wait for latency of A.
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bool ScheduleDAGSimple::isStrongDependency(NodeInfo *A, NodeInfo *B) {
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@@ -742,34 +557,11 @@ void ScheduleDAGSimple::ScheduleForward() {
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}
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}
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/// EmitAll - Emit all nodes in schedule sorted order.
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///
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void ScheduleDAGSimple::EmitAll() {
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// For each node in the ordering
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for (unsigned i = 0, N = Ordering.size(); i < N; i++) {
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// Get the scheduling info
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NodeInfo *NI = Ordering[i];
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if (NI->isInGroup()) {
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NodeGroupIterator NGI(Ordering[i]);
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while (NodeInfo *NI = NGI.next()) EmitNode(NI);
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} else {
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EmitNode(NI);
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}
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}
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}
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/// Schedule - Order nodes according to selected style.
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///
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void ScheduleDAGSimple::Schedule() {
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// Number the nodes
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NodeCount = std::distance(DAG.allnodes_begin(), DAG.allnodes_end());
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// Test to see if scheduling should occur
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bool ShouldSchedule = NodeCount > 3 && ScheduleStyle != noScheduling;
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// Set up minimum info for scheduling
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PrepareNodeInfo();
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// Construct node groups for flagged nodes
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IdentifyGroups();
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bool ShouldSchedule = NodeCount > 3 && Heuristic != noScheduling;
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// Don't waste time if is only entry and return
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if (ShouldSchedule) {
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// Get latency and resource requirements
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@@ -806,86 +598,11 @@ void ScheduleDAGSimple::Schedule() {
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EmitAll();
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}
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/// printChanges - Hilight changes in order caused by scheduling.
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///
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void ScheduleDAGSimple::printChanges(unsigned Index) {
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#ifndef NDEBUG
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// Get the ordered node count
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unsigned N = Ordering.size();
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// Determine if any changes
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unsigned i = 0;
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for (; i < N; i++) {
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NodeInfo *NI = Ordering[i];
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if (NI->Preorder != i) break;
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}
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if (i < N) {
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std::cerr << Index << ". New Ordering\n";
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for (i = 0; i < N; i++) {
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NodeInfo *NI = Ordering[i];
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std::cerr << " " << NI->Preorder << ". ";
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printSI(std::cerr, NI);
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std::cerr << "\n";
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if (NI->isGroupDominator()) {
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NodeGroup *Group = NI->Group;
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for (NIIterator NII = Group->group_begin(), E = Group->group_end();
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NII != E; NII++) {
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std::cerr << " ";
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printSI(std::cerr, *NII);
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std::cerr << "\n";
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}
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}
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}
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} else {
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std::cerr << Index << ". No Changes\n";
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}
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#endif
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}
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/// printSI - Print schedule info.
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///
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void ScheduleDAGSimple::printSI(std::ostream &O, NodeInfo *NI) const {
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#ifndef NDEBUG
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SDNode *Node = NI->Node;
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O << " "
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<< std::hex << Node << std::dec
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||||
<< ", Lat=" << NI->Latency
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<< ", Slot=" << NI->Slot
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<< ", ARITY=(" << Node->getNumOperands() << ","
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<< Node->getNumValues() << ")"
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<< " " << Node->getOperationName(&DAG);
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if (isFlagDefiner(Node)) O << "<#";
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if (isFlagUser(Node)) O << ">#";
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#endif
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}
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/// print - Print ordering to specified output stream.
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///
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void ScheduleDAGSimple::print(std::ostream &O) const {
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#ifndef NDEBUG
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using namespace std;
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O << "Ordering\n";
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for (unsigned i = 0, N = Ordering.size(); i < N; i++) {
|
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NodeInfo *NI = Ordering[i];
|
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printSI(O, NI);
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O << "\n";
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||||
if (NI->isGroupDominator()) {
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||||
NodeGroup *Group = NI->Group;
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for (NIIterator NII = Group->group_begin(), E = Group->group_end();
|
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NII != E; NII++) {
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O << " ";
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||||
printSI(O, *NII);
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O << "\n";
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}
|
||||
}
|
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}
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#endif
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||||
}
|
||||
|
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/// createSimpleDAGScheduler - This creates a simple two pass instruction
|
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/// scheduler.
|
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llvm::ScheduleDAG* llvm::createSimpleDAGScheduler(SelectionDAG &DAG,
|
||||
llvm::ScheduleDAG* llvm::createSimpleDAGScheduler(SchedHeuristics Heuristic,
|
||||
SelectionDAG &DAG,
|
||||
MachineBasicBlock *BB) {
|
||||
return new ScheduleDAGSimple(DAG, BB, DAG.getTarget());
|
||||
return new ScheduleDAGSimple(Heuristic, DAG, BB, DAG.getTarget());
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user