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[aarch32] fix bug 18268: Incorrect condition of vsel

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Given vsel_cc, op1, op2, since vsel has no LE/LT, to generate vsel for
such selection, it needs to inverse cc and swap op1 and op2. To inverse
cc, both L/G and E bits should be flipped.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197615 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Weiming Zhao
2013-12-18 22:25:17 +00:00
parent 5112542840
commit 4fdb649f3a
2 changed files with 5 additions and 5 deletions
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2
lib/Target/ARM/ARMISelLowering.cpp
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@@ -3232,7 +3232,7 @@ SDValue ARMTargetLowering::LowerSELECT(SDValue Op, SelectionDAG &DAG) const {
static ISD::CondCode getInverseCCForVSEL(ISD::CondCode CC) {
if (CC == ISD::SETNE)
return ISD::SETEQ;
return ISD::getSetCCSwappedOperands(CC);
return ISD::getSetCCInverse(CC, true);
}
static void checkVSELConstraints(ISD::CondCode CC, ARMCC::CondCodes &CondCode,