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https://github.com/c64scene-ar/llvm-6502.git
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Intel OCL built-ins calling conventions now support MacOS 32-bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168359 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Elena Demikhovsky
parent
01425d639e
commit
4fe5405bdd
@ -276,29 +276,6 @@ def CC_X86_Win64_C : CallingConv<[
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CCIfType<[f80], CCAssignToStack<0, 0>>
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]>;
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// X86-64 Intel OpenCL built-ins calling convention.
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def CC_Intel_OCL_BI : CallingConv<[
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CCIfType<[i32], CCIfSubtarget<"isTargetWin32()", CCAssignToStack<4, 4>>>,
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CCIfType<[i32], CCIfSubtarget<"isTargetWin64()", CCAssignToReg<[ECX, EDX, R8D, R9D]>>>,
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CCIfType<[i64], CCIfSubtarget<"isTargetWin64()", CCAssignToReg<[RCX, RDX, R8, R9 ]>>>,
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CCIfType<[i32], CCAssignToReg<[EDI, ESI, EDX, ECX]>>,
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CCIfType<[i64], CCAssignToReg<[RDI, RSI, RDX, RCX]>>,
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// The SSE vector arguments are passed in XMM registers.
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CCIfType<[f32, f64, v4i32, v2i64, v4f32, v2f64],
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CCAssignToReg<[XMM0, XMM1, XMM2, XMM3]>>,
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// The 256-bit vector arguments are passed in YMM registers.
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CCIfType<[v8f32, v4f64, v8i32, v4i64],
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CCAssignToReg<[YMM0, YMM1, YMM2, YMM3]>>,
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CCIfSubtarget<"isTargetWin64()", CCDelegateTo<CC_X86_Win64_C>>,
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CCDelegateTo<CC_X86_64_C>
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]>;
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def CC_X86_64_GHC : CallingConv<[
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// Promote i8/i16/i32 arguments to i64.
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CCIfType<[i8, i16, i32], CCPromoteToType<i64>>,
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@ -468,6 +445,30 @@ def CC_X86_32_HiPE : CallingConv<[
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CCIfType<[i32, f32], CCAssignToStack<4, 4>>
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]>;
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// X86-64 Intel OpenCL built-ins calling convention.
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def CC_Intel_OCL_BI : CallingConv<[
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CCIfType<[i32], CCIfSubtarget<"isTargetWin64()", CCAssignToReg<[ECX, EDX, R8D, R9D]>>>,
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CCIfType<[i64], CCIfSubtarget<"isTargetWin64()", CCAssignToReg<[RCX, RDX, R8, R9 ]>>>,
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CCIfType<[i32], CCIfSubtarget<"is64Bit()", CCAssignToReg<[EDI, ESI, EDX, ECX]>>>,
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CCIfType<[i64], CCIfSubtarget<"is64Bit()", CCAssignToReg<[RDI, RSI, RDX, RCX]>>>,
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CCIfType<[i32], CCAssignToStack<4, 4>>,
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// The SSE vector arguments are passed in XMM registers.
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CCIfType<[f32, f64, v4i32, v2i64, v4f32, v2f64],
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CCAssignToReg<[XMM0, XMM1, XMM2, XMM3]>>,
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// The 256-bit vector arguments are passed in YMM registers.
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CCIfType<[v8f32, v4f64, v8i32, v4i64],
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CCAssignToReg<[YMM0, YMM1, YMM2, YMM3]>>,
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CCIfSubtarget<"isTargetWin64()", CCDelegateTo<CC_X86_Win64_C>>,
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CCIfSubtarget<"is64Bit()", CCDelegateTo<CC_X86_64_C>>,
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CCDelegateTo<CC_X86_32_C>
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]>;
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//===----------------------------------------------------------------------===//
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// X86 Root Argument Calling Conventions
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//===----------------------------------------------------------------------===//
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@ -1,9 +1,12 @@
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; RUN: llc < %s -mtriple=i386-pc-win32 -mcpu=corei7-avx -mattr=+avx | FileCheck -check-prefix=WIN32 %s
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; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck -check-prefix=X32 %s
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; RUN: llc < %s -mtriple=i386-pc-win32 -mcpu=corei7-avx -mattr=+avx | FileCheck -check-prefix=X32 %s
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; RUN: llc < %s -mtriple=x86_64-win32 -mcpu=corei7-avx -mattr=+avx | FileCheck -check-prefix=WIN64 %s
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck -check-prefix=NOT_WIN %s
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck -check-prefix=X64 %s
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declare <16 x float> @func_float16_ptr(<16 x float>, <16 x float> *)
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declare <16 x float> @func_float16(<16 x float>, <16 x float>)
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declare i32 @func_int(i32, i32)
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; WIN64: testf16_inp
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; WIN64: vaddps {{.*}}, {{%ymm[0-1]}}
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; WIN64: vaddps {{.*}}, {{%ymm[0-1]}}
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@ -11,19 +14,19 @@ declare <16 x float> @func_float16(<16 x float>, <16 x float>)
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; WIN64: call
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; WIN64: ret
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; WIN32: testf16_inp
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; WIN32: movl %eax, (%esp)
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; WIN32: vaddps {{.*}}, {{%ymm[0-1]}}
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; WIN32: vaddps {{.*}}, {{%ymm[0-1]}}
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; WIN32: call
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; WIN32: ret
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; X32: testf16_inp
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; X32: movl %eax, (%esp)
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; X32: vaddps {{.*}}, {{%ymm[0-1]}}
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; X32: vaddps {{.*}}, {{%ymm[0-1]}}
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; X32: call
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; X32: ret
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; NOT_WIN: testf16_inp
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; NOT_WIN: vaddps {{.*}}, {{%ymm[0-1]}}
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; NOT_WIN: vaddps {{.*}}, {{%ymm[0-1]}}
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; NOT_WIN: leaq {{.*}}(%rsp), %rdi
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; NOT_WIN: call
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; NOT_WIN: ret
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; X64: testf16_inp
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; X64: vaddps {{.*}}, {{%ymm[0-1]}}
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; X64: vaddps {{.*}}, {{%ymm[0-1]}}
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; X64: leaq {{.*}}(%rsp), %rdi
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; X64: call
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; X64: ret
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;test calling conventions - input parameters
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define <16 x float> @testf16_inp(<16 x float> %a, <16 x float> %b) nounwind {
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@ -45,11 +48,11 @@ define <16 x float> @testf16_inp(<16 x float> %a, <16 x float> %b) nounwind {
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; WIN64: ret
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; preserved ymm8-ymm15
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; NOT_WIN: testf16_regs
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; NOT_WIN: call
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; NOT_WIN: vaddps {{%ymm[8-9]}}, %ymm0, %ymm0
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; NOT_WIN: vaddps {{%ymm[8-9]}}, %ymm1, %ymm1
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; NOT_WIN: ret
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; X64: testf16_regs
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; X64: call
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; X64: vaddps {{%ymm[8-9]}}, %ymm0, %ymm0
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; X64: vaddps {{%ymm[8-9]}}, %ymm1, %ymm1
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; X64: ret
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define <16 x float> @testf16_regs(<16 x float> %a, <16 x float> %b) nounwind {
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%y = alloca <16 x float>, align 16
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@ -84,24 +87,43 @@ define <16 x float> @testf16_regs(<16 x float> %a, <16 x float> %b) nounwind {
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; WIN64: vmovaps {{.*(%rsp).*}}, {{%ymm([6-9]|1[0-5])}} # 32-byte Reload
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; WIN64: vmovaps {{.*(%rsp).*}}, {{%ymm([6-9]|1[0-5])}} # 32-byte Reload
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; NOT_WIN: vmovaps {{%ymm([8-9]|1[0-5])}}, {{.*}}(%rbp) ## 32-byte Spill
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; NOT_WIN: vmovaps {{%ymm([8-9]|1[0-5])}}, {{.*}}(%rbp) ## 32-byte Spill
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; NOT_WIN: vmovaps {{%ymm([8-9]|1[0-5])}}, {{.*}}(%rbp) ## 32-byte Spill
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; NOT_WIN: vmovaps {{%ymm([8-9]|1[0-5])}}, {{.*}}(%rbp) ## 32-byte Spill
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; NOT_WIN: vmovaps {{%ymm([8-9]|1[0-5])}}, {{.*}}(%rbp) ## 32-byte Spill
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; NOT_WIN: vmovaps {{%ymm([8-9]|1[0-5])}}, {{.*}}(%rbp) ## 32-byte Spill
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; NOT_WIN: vmovaps {{%ymm([8-9]|1[0-5])}}, {{.*}}(%rbp) ## 32-byte Spill
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; NOT_WIN: vmovaps {{%ymm([8-9]|1[0-5])}}, {{.*}}(%rbp) ## 32-byte Spill
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; NOT_WIN: call
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; NOT_WIN: vmovaps {{.*}}(%rbp), {{%ymm([8-9]|1[0-5])}} ## 32-byte Reload
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; NOT_WIN: vmovaps {{.*}}(%rbp), {{%ymm([8-9]|1[0-5])}} ## 32-byte Reload
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; NOT_WIN: vmovaps {{.*}}(%rbp), {{%ymm([8-9]|1[0-5])}} ## 32-byte Reload
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; NOT_WIN: vmovaps {{.*}}(%rbp), {{%ymm([8-9]|1[0-5])}} ## 32-byte Reload
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; NOT_WIN: vmovaps {{.*}}(%rbp), {{%ymm([8-9]|1[0-5])}} ## 32-byte Reload
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; NOT_WIN: vmovaps {{.*}}(%rbp), {{%ymm([8-9]|1[0-5])}} ## 32-byte Reload
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; NOT_WIN: vmovaps {{.*}}(%rbp), {{%ymm([8-9]|1[0-5])}} ## 32-byte Reload
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; NOT_WIN: vmovaps {{.*}}(%rbp), {{%ymm([8-9]|1[0-5])}} ## 32-byte Reload
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; X64: vmovaps {{%ymm([8-9]|1[0-5])}}, {{.*}}(%rbp) ## 32-byte Spill
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; X64: vmovaps {{%ymm([8-9]|1[0-5])}}, {{.*}}(%rbp) ## 32-byte Spill
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; X64: vmovaps {{%ymm([8-9]|1[0-5])}}, {{.*}}(%rbp) ## 32-byte Spill
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; X64: vmovaps {{%ymm([8-9]|1[0-5])}}, {{.*}}(%rbp) ## 32-byte Spill
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; X64: vmovaps {{%ymm([8-9]|1[0-5])}}, {{.*}}(%rbp) ## 32-byte Spill
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; X64: vmovaps {{%ymm([8-9]|1[0-5])}}, {{.*}}(%rbp) ## 32-byte Spill
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; X64: vmovaps {{%ymm([8-9]|1[0-5])}}, {{.*}}(%rbp) ## 32-byte Spill
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; X64: vmovaps {{%ymm([8-9]|1[0-5])}}, {{.*}}(%rbp) ## 32-byte Spill
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; X64: call
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; X64: vmovaps {{.*}}(%rbp), {{%ymm([8-9]|1[0-5])}} ## 32-byte Reload
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; X64: vmovaps {{.*}}(%rbp), {{%ymm([8-9]|1[0-5])}} ## 32-byte Reload
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; X64: vmovaps {{.*}}(%rbp), {{%ymm([8-9]|1[0-5])}} ## 32-byte Reload
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; X64: vmovaps {{.*}}(%rbp), {{%ymm([8-9]|1[0-5])}} ## 32-byte Reload
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; X64: vmovaps {{.*}}(%rbp), {{%ymm([8-9]|1[0-5])}} ## 32-byte Reload
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; X64: vmovaps {{.*}}(%rbp), {{%ymm([8-9]|1[0-5])}} ## 32-byte Reload
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; X64: vmovaps {{.*}}(%rbp), {{%ymm([8-9]|1[0-5])}} ## 32-byte Reload
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; X64: vmovaps {{.*}}(%rbp), {{%ymm([8-9]|1[0-5])}} ## 32-byte Reload
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define intel_ocl_bicc <16 x float> @test_prolog_epilog(<16 x float> %a, <16 x float> %b) nounwind {
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%c = call <16 x float> @func_float16(<16 x float> %a, <16 x float> %b)
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ret <16 x float> %c
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}
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; test functions with integer parameters
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; pass parameters on stack for 32-bit platform
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; X32: movl {{.*}}, 4(%esp)
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; X32: movl {{.*}}, (%esp)
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; X32: call
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; X32: addl {{.*}}, %eax
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; pass parameters in registers for 64-bit platform
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; X64: leal {{.*}}, %edi
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; X64: movl {{.*}}, %esi
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; X64: call
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; X64: addl {{.*}}, %eax
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define i32 @test_int(i32 %a, i32 %b) nounwind {
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%c1 = add i32 %a, %b
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%c2 = call intel_ocl_bicc i32 @func_int(i32 %c1, i32 %a)
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%c = add i32 %c2, %b
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ret i32 %c
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}
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