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https://github.com/c64scene-ar/llvm-6502.git
synced 2025-07-24 22:24:54 +00:00
Revert "Add Constant Hoisting Pass" (r200034)
This commit caused -Woverloaded-virtual warnings. The two new TargetTransformInfo::getIntImmCost functions were only added to the superclass, and to the X86 subclass. The other targets were not updated, and the warning highlighted this by pointing out that e.g. ARMTTI::getIntImmCost was hiding the two new getIntImmCost variants. We could pacify the warning by adding "using TargetTransformInfo::getIntImmCost" to the various subclasses, or turning it off, but I suspect that it's wrong to leave the functions unimplemnted in those targets. The default implementations return TCC_Free, which I don't think is right e.g. for ARM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200058 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@@ -70,8 +70,6 @@ static cl::opt<bool> DisableMachineSink("disable-machine-sink", cl::Hidden,
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cl::desc("Disable Machine Sinking"));
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static cl::opt<bool> DisableLSR("disable-lsr", cl::Hidden,
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cl::desc("Disable Loop Strength Reduction Pass"));
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static cl::opt<bool> DisableConstantHoisting("disable-constant-hoisting",
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cl::Hidden, cl::desc("Disable ConstantHoisting"));
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static cl::opt<bool> DisableCGP("disable-cgp", cl::Hidden,
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cl::desc("Disable Codegen Prepare"));
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static cl::opt<bool> DisableCopyProp("disable-copyprop", cl::Hidden,
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@@ -398,10 +396,6 @@ void TargetPassConfig::addIRPasses() {
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// Make sure that no unreachable blocks are instruction selected.
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addPass(createUnreachableBlockEliminationPass());
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// Prepare expensive constants for SelectionDAG.
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if (getOptLevel() != CodeGenOpt::None && !DisableConstantHoisting)
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addPass(createConstantHoistingPass());
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}
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/// Turn exception handling constructs into something the code generators can
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@@ -3212,14 +3212,11 @@ SDValue DAGCombiner::visitOR(SDNode *N) {
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if (N1C && N0.getOpcode() == ISD::AND && N0.getNode()->hasOneUse() &&
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isa<ConstantSDNode>(N0.getOperand(1))) {
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ConstantSDNode *C1 = cast<ConstantSDNode>(N0.getOperand(1));
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if ((C1->getAPIntValue() & N1C->getAPIntValue()) != 0) {
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SDValue COR = DAG.FoldConstantArithmetic(ISD::OR, VT, N1C, C1);
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if (!COR.getNode())
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return SDValue();
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if ((C1->getAPIntValue() & N1C->getAPIntValue()) != 0)
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return DAG.getNode(ISD::AND, SDLoc(N), VT,
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DAG.getNode(ISD::OR, SDLoc(N0), VT,
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N0.getOperand(0), N1), COR);
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}
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N0.getOperand(0), N1),
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DAG.FoldConstantArithmetic(ISD::OR, VT, N1C, C1));
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}
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// fold (or (setcc x), (setcc y)) -> (setcc (or x, y))
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if (isSetCCEquivalent(N0, LL, LR, CC0) && isSetCCEquivalent(N1, RL, RR, CC1)){
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@@ -384,12 +384,9 @@ static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
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llvm_unreachable("Should only be used on nodes with operands");
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default: break; // Normal nodes don't need extra info.
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case ISD::TargetConstant:
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case ISD::Constant: {
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const ConstantSDNode *C = cast<ConstantSDNode>(N);
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ID.AddPointer(C->getConstantIntValue());
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ID.AddBoolean(C->isOpaque());
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case ISD::Constant:
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ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
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break;
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}
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case ISD::TargetConstantFP:
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case ISD::ConstantFP: {
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ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
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@@ -974,21 +971,19 @@ SDValue SelectionDAG::getNOT(SDLoc DL, SDValue Val, EVT VT) {
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return getNode(ISD::XOR, DL, VT, Val, NegOne);
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}
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SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT, bool isO) {
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SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
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EVT EltVT = VT.getScalarType();
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assert((EltVT.getSizeInBits() >= 64 ||
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(uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
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"getConstant with a uint64_t value that doesn't fit in the type!");
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return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT, isO);
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return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
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}
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SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT, bool isO)
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{
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return getConstant(*ConstantInt::get(*Context, Val), VT, isT, isO);
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SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
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return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
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}
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SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT,
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bool isO) {
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SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
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assert(VT.isInteger() && "Cannot create FP integer constant!");
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EVT EltVT = VT.getScalarType();
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@@ -1030,7 +1025,7 @@ SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT,
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for (unsigned i = 0; i < ViaVecNumElts / VT.getVectorNumElements(); ++i) {
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EltParts.push_back(getConstant(NewVal.lshr(i * ViaEltSizeInBits)
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.trunc(ViaEltSizeInBits),
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ViaEltVT, isT, isO));
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ViaEltVT, isT));
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}
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// EltParts is currently in little endian order. If we actually want
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@@ -1061,7 +1056,6 @@ SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT,
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FoldingSetNodeID ID;
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AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
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ID.AddPointer(Elt);
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ID.AddBoolean(isO);
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void *IP = 0;
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SDNode *N = NULL;
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if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
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@@ -1069,7 +1063,7 @@ SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT,
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return SDValue(N, 0);
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if (!N) {
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N = new (NodeAllocator) ConstantSDNode(isT, isO, Elt, EltVT);
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N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT);
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CSEMap.InsertNode(N, IP);
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AllNodes.push_back(N);
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}
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@@ -2795,13 +2789,10 @@ SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, EVT VT,
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ConstantSDNode *Scalar1 = dyn_cast<ConstantSDNode>(Cst1);
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ConstantSDNode *Scalar2 = dyn_cast<ConstantSDNode>(Cst2);
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if (Scalar1 && Scalar2 && (Scalar1->isOpaque() || Scalar2->isOpaque()))
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return SDValue();
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if (Scalar1 && Scalar2)
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if (Scalar1 && Scalar2) {
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// Scalar instruction.
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Inputs.push_back(std::make_pair(Scalar1, Scalar2));
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else {
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} else {
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// For vectors extract each constant element into Inputs so we can constant
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// fold them individually.
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BuildVectorSDNode *BV1 = dyn_cast<BuildVectorSDNode>(Cst1);
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@@ -2817,9 +2808,6 @@ SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, EVT VT,
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if (!V1 || !V2) // Not a constant, bail.
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return SDValue();
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if (V1->isOpaque() || V2->isOpaque())
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return SDValue();
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// Avoid BUILD_VECTOR nodes that perform implicit truncation.
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// FIXME: This is valid and could be handled by truncating the APInts.
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if (V1->getValueType(0) != SVT || V2->getValueType(0) != SVT)
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@@ -3573,11 +3561,10 @@ static SDValue getMemsetStringVal(EVT VT, SDLoc dl, SelectionDAG &DAG,
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Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8;
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}
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// If the "cost" of materializing the integer immediate is less than the cost
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// of a load, then it is cost effective to turn the load into the immediate.
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// If the "cost" of materializing the integer immediate is 1 or free, then
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// it is cost effective to turn the load into the immediate.
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const TargetTransformInfo *TTI = DAG.getTargetTransformInfo();
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if (TTI->getIntImmCost(Val, VT.getTypeForEVT(*DAG.getContext())) <
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TargetTransformInfo::TCC_Load)
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if (TTI->getIntImmCost(Val, VT.getTypeForEVT(*DAG.getContext())) < 2)
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return DAG.getConstant(Val, VT);
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return SDValue(0, 0);
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}
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@@ -2945,9 +2945,6 @@ void SelectionDAGBuilder::visitBitCast(const User &I) {
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if (DestVT != N.getValueType())
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setValue(&I, DAG.getNode(ISD::BITCAST, getCurSDLoc(),
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DestVT, N)); // convert types.
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else if(ConstantSDNode *C = dyn_cast<ConstantSDNode>(N))
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setValue(&I, DAG.getConstant(C->getAPIntValue(), C->getValueType(0),
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/*isTarget=*/false, /*isOpaque*/true));
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else
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setValue(&I, N); // noop cast.
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}
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@@ -81,10 +81,7 @@ std::string SDNode::getOperationName(const SelectionDAG *G) const {
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case ISD::VALUETYPE: return "ValueType";
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case ISD::Register: return "Register";
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case ISD::RegisterMask: return "RegisterMask";
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case ISD::Constant:
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if (cast<ConstantSDNode>(this)->isOpaque())
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return "OpaqueConstant";
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return "Constant";
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case ISD::Constant: return "Constant";
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case ISD::ConstantFP: return "ConstantFP";
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case ISD::GlobalAddress: return "GlobalAddress";
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case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
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@@ -114,10 +111,7 @@ std::string SDNode::getOperationName(const SelectionDAG *G) const {
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}
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case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
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case ISD::TargetConstant:
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if (cast<ConstantSDNode>(this)->isOpaque())
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return "OpaqueTargetConstant";
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return "TargetConstant";
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case ISD::TargetConstant: return "TargetConstant";
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case ISD::TargetConstantFP: return "TargetConstantFP";
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case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
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case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
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@@ -1470,23 +1470,17 @@ TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
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if (Cond == ISD::SETGE || Cond == ISD::SETUGE) {
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if (C1 == MinVal) return DAG.getConstant(1, VT); // X >= MIN --> true
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// X >= C0 --> X > (C0-1)
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APInt C = C1-1;
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if (!N1C->isOpaque() || (N1C->isOpaque() && C.getBitWidth() <= 64 &&
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isLegalICmpImmediate(C.getSExtValue())))
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return DAG.getSetCC(dl, VT, N0,
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DAG.getConstant(C, N1.getValueType()),
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(Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT);
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return DAG.getSetCC(dl, VT, N0,
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DAG.getConstant(C1-1, N1.getValueType()),
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(Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT);
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}
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if (Cond == ISD::SETLE || Cond == ISD::SETULE) {
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if (C1 == MaxVal) return DAG.getConstant(1, VT); // X <= MAX --> true
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// X <= C0 --> X < (C0+1)
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APInt C = C1+1;
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if (!N1C->isOpaque() || (N1C->isOpaque() && C.getBitWidth() <= 64 &&
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isLegalICmpImmediate(C.getSExtValue())))
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return DAG.getSetCC(dl, VT, N0,
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DAG.getConstant(C, N1.getValueType()),
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(Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT);
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return DAG.getSetCC(dl, VT, N0,
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DAG.getConstant(C1+1, N1.getValueType()),
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(Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT);
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}
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if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C1 == MinVal)
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