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Add asm parsing support w/ testcases for strex/ldrex family of instructions

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128236 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bruno Cardoso Lopes
2011-03-24 21:04:58 +00:00
parent 02af767dca
commit 505f3cd296
11 changed files with 156 additions and 61 deletions
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26
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
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@@ -350,6 +350,23 @@ public:
int64_t Value = CE->getValue();
return ((Value & 0x3) == 0 && Value <= 1020 && Value >= -1020);
}
bool isMemMode7() const {
if (!isMemory() ||
getMemPreindexed() ||
getMemPostindexed() ||
getMemOffsetIsReg() ||
getMemNegative() ||
getMemWriteback())
return false;
const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getMemOffset());
if (!CE) return false;
if (CE->getValue())
return false;
return true;
}
bool isMemModeRegThumb() const {
if (!isMemory() || !getMemOffsetIsReg() || getMemWriteback())
return false;
@@ -438,6 +455,15 @@ public:
Inst.addOperand(MCOperand::CreateImm(unsigned(getMemBarrierOpt())));
}
void addMemMode7Operands(MCInst &Inst, unsigned N) const {
assert(N == 1 && isMemMode7() && "Invalid number of operands!");
Inst.addOperand(MCOperand::CreateReg(getMemBaseRegNum()));
const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getMemOffset());
assert((CE || CE->getValue() == 0) &&
"No offset operand support in mode 7");
}
void addMemMode5Operands(MCInst &Inst, unsigned N) const {
assert(N == 2 && isMemMode5() && "Invalid number of operands!");