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Fix CodeGen/PowerPC/2006-10-17-brcc-miscompile.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31019 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -3689,7 +3689,7 @@ SDOperand DAGCombiner::SimplifySetCC(MVT::ValueType VT, SDOperand N0,
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cast<ConstantSDNode>(N0.getOperand(1))->getValue() == 1) {
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cast<ConstantSDNode>(N0.getOperand(1))->getValue() == 1) {
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// If this is (X^1) == 0/1, swap the RHS and eliminate the xor. We
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// If this is (X^1) == 0/1, swap the RHS and eliminate the xor. We
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// can only do this if the top bits are known zero.
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// can only do this if the top bits are known zero.
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if (TLI.MaskedValueIsZero(N1,
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if (TLI.MaskedValueIsZero(N0,
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MVT::getIntVTBitMask(N0.getValueType())-1)){
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MVT::getIntVTBitMask(N0.getValueType())-1)){
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// Okay, get the un-inverted input value.
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// Okay, get the un-inverted input value.
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SDOperand Val;
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SDOperand Val;
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