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Lower thumbv4t & thumbv5 lo->lo copies through a push-pop sequence
On pre-v6 hardware, 'MOV lo, lo' gives undefined results, so such copies need to be avoided. This patch trades simplicity for implementation time at the expense of performance... As they say: correctness first, then performance. See http://lists.cs.uiuc.edu/pipermail/llvmdev/2014-August/075998.html for a few ideas on how to make this better. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216138 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -11,6 +11,7 @@
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//
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//===----------------------------------------------------------------------===//
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#include "ARMSubtarget.h"
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#include "Thumb1InstrInfo.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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@ -41,10 +42,30 @@ void Thumb1InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I, DebugLoc DL,
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unsigned DestReg, unsigned SrcReg,
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bool KillSrc) const {
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AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tMOVr), DestReg)
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.addReg(SrcReg, getKillRegState(KillSrc)));
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// Need to check the arch.
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MachineFunction &MF = *MBB.getParent();
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const ARMSubtarget &st = MF.getTarget().getSubtarget<ARMSubtarget>();
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assert(ARM::GPRRegClass.contains(DestReg, SrcReg) &&
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"Thumb1 can only copy GPR registers");
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if (st.hasV6Ops() || ARM::hGPRRegClass.contains(SrcReg)
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|| !ARM::tGPRRegClass.contains(DestReg))
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AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tMOVr), DestReg)
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.addReg(SrcReg, getKillRegState(KillSrc)));
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else {
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// FIXME: The performance consequences of this are going to be atrocious.
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// Some things to try that should be better:
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// * 'mov hi, $src; mov $dst, hi', with hi as either r10 or r11
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// * 'movs $dst, $src' if cpsr isn't live
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// See: http://lists.cs.uiuc.edu/pipermail/llvmdev/2014-August/075998.html
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// 'MOV lo, lo' is unpredictable on < v6, so use the stack to do it
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AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tPUSH)))
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.addReg(SrcReg, getKillRegState(KillSrc));
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AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tPOP)))
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.addReg(DestReg, getDefRegState(true));
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}
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}
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void Thumb1InstrInfo::
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@ -20,12 +20,15 @@ entry:
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; CHECK-THUMB-LABEL: test_cmpxchg_res_i8
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; CHECK-THUMB: bl __sync_val_compare_and_swap_1
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; CHECK-THUMB: mov [[R1:r[0-9]+]], r0
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; CHECK-THUMB-NOT: mov [[R1:r[0-7]]], r0
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; CHECK-THUMB: push {r0}
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; CHECK-THUMB: pop {[[R1:r[0-7]]]}
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; CHECK-THUMB: movs r0, #1
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; CHECK-THUMB: movs [[R2:r[0-9]+]], #0
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; CHECK-THUMB: cmp [[R1]], {{r[0-9]+}}
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; CHECK-THU<B: beq
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; CHECK-THUMB: mov r0, [[R2]]
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; CHECK-THUMB: push {[[R2]]}
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; CHECK-THUMB: pop {r0}
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; CHECK-ARMV7-LABEL: test_cmpxchg_res_i8
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; CHECK-ARMV7: ldrexb [[R3:r[0-9]+]], [r0]
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38
test/CodeGen/Thumb/copy_thumb.ll
Normal file
38
test/CodeGen/Thumb/copy_thumb.ll
Normal file
@ -0,0 +1,38 @@
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; RUN: llc -mtriple=armv4-none--eabi < %s | FileCheck %s --check-prefix=CHECK-LOLOMOV
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; RUN: llc -mtriple=armv4t-none--eabi < %s | FileCheck %s --check-prefix=CHECK-LOLOMOV
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; RUN: llc -mtriple=armv5-none--eabi < %s | FileCheck %s --check-prefix=CHECK-LOLOMOV
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; RUN: llc -mtriple=armv6-none--eabi < %s | FileCheck %s --check-prefix=CHECK-LOLOMOV
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; RUN: llc -mtriple=armv7-none--eabi < %s | FileCheck %s --check-prefix=CHECK-LOLOMOV
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; RUN: llc -mtriple=thumbv6-none--eabi < %s | FileCheck %s --check-prefix=CHECK-LOLOMOV
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; RUN: llc -mtriple=thumbv7-none--eabi < %s | FileCheck %s --check-prefix=CHECK-LOLOMOV
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; CHECK-LOLOMOV-LABEL: foo
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; CHECK-LOLOMOV: mov [[TMP:r[0-7]]], [[SRC1:r[01]]]
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; CHECK-LOLOMOV-NEXT: mov [[SRC1]], [[SRC2:r[01]]]
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; CHECK-LOLOMOV-NEXT: mov [[SRC2]], [[TMP]]
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; CHECK-LOLOMOV-LABEL: bar
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; CHECK-LOLOMOV-LABEL: fnend
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;
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; 'MOV lo, lo' in Thumb mode produces undefined results on pre-v6 hardware
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; RUN: llc -mtriple=thumbv4t-none--eabi < %s | FileCheck %s --check-prefix=CHECK-NOLOLOMOV
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; RUN: llc -mtriple=thumbv5-none--eabi < %s | FileCheck %s --check-prefix=CHECK-NOLOLOMOV
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; CHECK-NOLOLOMOV-LABEL: foo
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; CHECK-NOLOLOMOV-NOT: mov [[TMP:r[0-7]]], [[SRC1:r[01]]]
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; CHECK-NOLOLOMOV: push {[[SRC1:r[01]]]}
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; CHECK-NOLOLOMOV-NEXT: pop {[[TMP:r[0-7]]]}
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; CHECK-NOLOLOMOV-NOT: mov [[TMP:r[0-7]]], [[SRC1:r[01]]]
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; CHECK-NOLOLOMOV: push {[[SRC2:r[01]]]}
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; CHECK-NOLOLOMOV-NEXT: pop {[[SRC1]]}
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; CHECK-NOLOLOMOV-NOT: mov [[TMP:r[0-7]]], [[SRC1:r[01]]]
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; CHECK-NOLOLOMOV: push {[[TMP]]}
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; CHECK-NOLOLOMOV-NEXT: pop {[[SRC2]]}
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; CHECK-NOLOLOMOV-LABEL: bar
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; CHECK-NOLOLOMOV-LABEL: fnend
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declare void @bar(i32, i32)
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define void @foo(i32 %a, i32 %b) {
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entry:
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call void @bar(i32 %b, i32 %a);
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ret void
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}
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