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AArch64/ARM64: add support for large code-model jump tables.

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I've left the MachO CodeGen as it is, there's a reasonable chance it should use
the GOT like ConstPools, but I'm not certain.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206288 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tim Northover 2014-04-15 14:00:11 +00:00
parent e9cae9b79f
commit 5080ae2e21
3 changed files with 23 additions and 2 deletions
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11
lib/Target/ARM64/ARM64ISelLowering.cpp
View File

@ -3546,6 +3546,17 @@ SDValue ARM64TargetLowering::LowerJumpTable(SDValue Op,
EVT PtrVT = getPointerTy(); EVT PtrVT = getPointerTy();
SDLoc DL(Op); SDLoc DL(Op);
if (getTargetMachine().getCodeModel() == CodeModel::Large &&
!Subtarget->isTargetMachO()) {
const unsigned char MO_NC = ARM64II::MO_NC;
return DAG.getNode(
ARM64ISD::WrapperLarge, DL, PtrVT,
DAG.getTargetJumpTable(JT->getIndex(), PtrVT, ARM64II::MO_G3),
DAG.getTargetJumpTable(JT->getIndex(), PtrVT, ARM64II::MO_G2 | MO_NC),
DAG.getTargetJumpTable(JT->getIndex(), PtrVT, ARM64II::MO_G1 | MO_NC),
DAG.getTargetJumpTable(JT->getIndex(), PtrVT, ARM64II::MO_G0 | MO_NC));
}
SDValue Hi = DAG.getTargetJumpTable(JT->getIndex(), PtrVT, ARM64II::MO_PAGE); SDValue Hi = DAG.getTargetJumpTable(JT->getIndex(), PtrVT, ARM64II::MO_PAGE);
SDValue Lo = DAG.getTargetJumpTable(JT->getIndex(), PtrVT, SDValue Lo = DAG.getTargetJumpTable(JT->getIndex(), PtrVT,
ARM64II::MO_PAGEOFF | ARM64II::MO_NC); ARM64II::MO_PAGEOFF | ARM64II::MO_NC);

7
lib/Target/ARM64/ARM64InstrInfo.td
View File

@ -416,6 +416,13 @@ def : Pat<(ARM64WrapperLarge tconstpool:$g3, tconstpool:$g2,
tconstpool:$g1, 16), tconstpool:$g1, 16),
tconstpool:$g0, 0)>; tconstpool:$g0, 0)>;
def : Pat<(ARM64WrapperLarge tjumptable:$g3, tjumptable:$g2,
tjumptable:$g1, tjumptable:$g0),
(MOVKXi (MOVKXi (MOVKXi (MOVZXi tjumptable:$g3, 48),
tjumptable:$g2, 32),
tjumptable:$g1, 16),
tjumptable:$g0, 0)>;
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Arithmetic instructions. // Arithmetic instructions.

7
test/CodeGen/AArch64/jump-table.ll
View File

@ -1,6 +1,9 @@
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s ; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s
; RUN: llc -code-model=large -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck --check-prefix=CHECK-LARGE %s ; RUN: llc -code-model=large -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck --check-prefix=CHECK-LARGE %s
; RUN: llc -mtriple=aarch64-none-linux-gnu -verify-machineinstrs -relocation-model=pic <%s | FileCheck --check-prefix=CHECK-PIC %s ; RUN: llc -mtriple=aarch64-none-linux-gnu -verify-machineinstrs -relocation-model=pic <%s | FileCheck --check-prefix=CHECK-PIC %s
; RUN: llc -verify-machineinstrs -o - %s -mtriple=arm64-none-linux-gnu | FileCheck %s
; RUN: llc -code-model=large -verify-machineinstrs -o - %s -mtriple=arm64-none-linux-gnu | FileCheck --check-prefix=CHECK-LARGE %s
; RUN: llc -mtriple=arm64-none-linux-gnu -verify-machineinstrs -relocation-model=pic -o - %s | FileCheck --check-prefix=CHECK-PIC %s
define i32 @test_jumptable(i32 %in) { define i32 @test_jumptable(i32 %in) {
; CHECK: test_jumptable ; CHECK: test_jumptable
@ -12,7 +15,7 @@ define i32 @test_jumptable(i32 %in) {
i32 4, label %lbl4 i32 4, label %lbl4
] ]
; CHECK: adrp [[JTPAGE:x[0-9]+]], .LJTI0_0 ; CHECK: adrp [[JTPAGE:x[0-9]+]], .LJTI0_0
; CHECK: add x[[JT:[0-9]+]], [[JTPAGE]], #:lo12:.LJTI0_0 ; CHECK: add x[[JT:[0-9]+]], [[JTPAGE]], {{#?}}:lo12:.LJTI0_0
; CHECK: ldr [[DEST:x[0-9]+]], [x[[JT]], {{x[0-9]+}}, lsl #3] ; CHECK: ldr [[DEST:x[0-9]+]], [x[[JT]], {{x[0-9]+}}, lsl #3]
; CHECK: br [[DEST]] ; CHECK: br [[DEST]]
@ -24,7 +27,7 @@ define i32 @test_jumptable(i32 %in) {
; CHECK-LARGE: br [[DEST]] ; CHECK-LARGE: br [[DEST]]
; CHECK-PIC: adrp [[JTPAGE:x[0-9]+]], .LJTI0_0 ; CHECK-PIC: adrp [[JTPAGE:x[0-9]+]], .LJTI0_0
; CHECK-PIC: add x[[JT:[0-9]+]], [[JTPAGE]], #:lo12:.LJTI0_0 ; CHECK-PIC: add x[[JT:[0-9]+]], [[JTPAGE]], {{#?}}:lo12:.LJTI0_0
; CHECK-PIC: ldrsw [[DEST:x[0-9]+]], [x[[JT]], {{x[0-9]+}}, lsl #2] ; CHECK-PIC: ldrsw [[DEST:x[0-9]+]], [x[[JT]], {{x[0-9]+}}, lsl #2]
; CHECK-PIC: add [[TABLE:x[0-9]+]], [[DEST]], x[[JT]] ; CHECK-PIC: add [[TABLE:x[0-9]+]], [[DEST]], x[[JT]]
; CHECK-PIC: br [[TABLE]] ; CHECK-PIC: br [[TABLE]]