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Check to make sure we can select the instruction before trying to put the

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operands into a register.  Otherwise, we may materialize dead code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144805 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chad Rosier 2011-11-16 18:39:44 +00:00
parent 14117c4477
commit 508a1f4db1
1 changed files with 6 additions and 6 deletions
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12
lib/Target/ARM/ARMFastISel.cpp
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@ -1670,12 +1670,6 @@ bool ARMFastISel::SelectBinaryOp(const Instruction *I, unsigned ISDOpcode) {
if (isFloat && !Subtarget->hasVFP2()) if (isFloat && !Subtarget->hasVFP2())
return false; return false;
unsigned Op1 = getRegForValue(I->getOperand(0));
if (Op1 == 0) return false;
unsigned Op2 = getRegForValue(I->getOperand(1));
if (Op2 == 0) return false;
unsigned Opc; unsigned Opc;
bool is64bit = VT == MVT::f64 || VT == MVT::i64; bool is64bit = VT == MVT::f64 || VT == MVT::i64;
switch (ISDOpcode) { switch (ISDOpcode) {
@ -1690,6 +1684,12 @@ bool ARMFastISel::SelectBinaryOp(const Instruction *I, unsigned ISDOpcode) {
Opc = is64bit ? ARM::VMULD : ARM::VMULS; Opc = is64bit ? ARM::VMULD : ARM::VMULS;
break; break;
} }
unsigned Op1 = getRegForValue(I->getOperand(0));
if (Op1 == 0) return false;
unsigned Op2 = getRegForValue(I->getOperand(1));
if (Op2 == 0) return false;
unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT)); unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT));
AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
TII.get(Opc), ResultReg) TII.get(Opc), ResultReg)