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[SelectionDAG] Unary vector constant folding integer legality fixes
This patch fixes issues with vector constant folding not correctly handling scalar input operands if they require implicit truncation - this was tested with llvm-stress as recommended by Patrik H Hagglund. The patch ensures that integer input scalars from a build vector are correctly truncated before folding, and that constant integer scalar results are promoted to a legal type before inclusion in the new folded build vector. I have added another crash test case and also a test for UINT_TO_FP / SINT_TO_FP using an non-truncated scalar input, which was failing before this patch. Differential Revision: http://reviews.llvm.org/D9282 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236308 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2858,23 +2858,43 @@ SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL,
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// FIXME: Entirely reasonable to perform folding of other unary
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// FIXME: Entirely reasonable to perform folding of other unary
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// operations here as the need arises.
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// operations here as the need arises.
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break;
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break;
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case ISD::TRUNCATE:
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// Constant build vector truncation can be done with the original scalar
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// operands but with a new build vector with the truncated value type.
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return getNode(ISD::BUILD_VECTOR, DL, VT, BV->ops());
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case ISD::FNEG:
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case ISD::FNEG:
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case ISD::FABS:
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case ISD::FABS:
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case ISD::FCEIL:
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case ISD::FCEIL:
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case ISD::FTRUNC:
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case ISD::FTRUNC:
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case ISD::FFLOOR:
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case ISD::FFLOOR:
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case ISD::FP_EXTEND:
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case ISD::FP_EXTEND:
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case ISD::TRUNCATE:
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case ISD::UINT_TO_FP:
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case ISD::UINT_TO_FP:
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case ISD::SINT_TO_FP: {
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case ISD::SINT_TO_FP: {
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EVT SVT = VT.getScalarType();
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EVT InVT = BV->getValueType(0);
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EVT InSVT = InVT.getScalarType();
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// Find legal integer scalar type for constant promotion.
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EVT LegalSVT = SVT;
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if (SVT.isInteger()) {
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LegalSVT = TLI->getTypeToTransformTo(*getContext(), SVT);
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assert(LegalSVT.bitsGE(SVT) && "Unexpected legal scalar type size");
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}
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// Let the above scalar folding handle the folding of each element.
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// Let the above scalar folding handle the folding of each element.
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SmallVector<SDValue, 8> Ops;
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SmallVector<SDValue, 8> Ops;
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for (int i = 0, e = VT.getVectorNumElements(); i != e; ++i) {
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for (int i = 0, e = VT.getVectorNumElements(); i != e; ++i) {
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SDValue OpN = BV->getOperand(i);
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SDValue OpN = BV->getOperand(i);
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OpN = getNode(Opcode, DL, VT.getVectorElementType(), OpN);
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EVT OpVT = OpN.getValueType();
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// Build vector (integer) scalar operands may need implicit
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// truncation - do this before constant folding.
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if (OpVT.isInteger() && OpVT.bitsGT(InSVT))
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OpN = getNode(ISD::TRUNCATE, DL, InSVT, OpN);
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OpN = getNode(Opcode, DL, SVT, OpN);
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// Legalize the (integer) scalar constant if necessary.
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if (LegalSVT != SVT)
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OpN = getNode(ISD::ANY_EXTEND, DL, LegalSVT, OpN);
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if (OpN.getOpcode() != ISD::UNDEF &&
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if (OpN.getOpcode() != ISD::UNDEF &&
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OpN.getOpcode() != ISD::Constant &&
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OpN.getOpcode() != ISD::Constant &&
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OpN.getOpcode() != ISD::ConstantFP)
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OpN.getOpcode() != ISD::ConstantFP)
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17
test/CodeGen/X86/fold-vector-bv-crash.ll
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17
test/CodeGen/X86/fold-vector-bv-crash.ll
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@ -0,0 +1,17 @@
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; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx
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;
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; llvm-stress generated crash case due to build_vector implicit
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; truncation bug from constant folding after legalization.
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;
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@G = external global i32
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define void @bv_crash_test() {
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%I = insertelement <4 x i64> zeroinitializer, i64 15910, i32 0
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%Tr = trunc <4 x i64> %I to <4 x i8>
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%Bc = bitcast <4 x i8> %Tr to i32
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store volatile i32 %Bc, i32* @G
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ret void
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}
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13
test/CodeGen/X86/fold-vector-trunc-sitofp.ll
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13
test/CodeGen/X86/fold-vector-trunc-sitofp.ll
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@ -0,0 +1,13 @@
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; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s
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; Check that constant integers are correctly being truncated before float conversion
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define <4 x float> @test1() {
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; CHECK-LABEL: test1
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; CHECK: movaps {{.*#+}} xmm0 = [-1.000000e+00,0.000000e+00,-1.000000e+00,0.000000e+00]
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; CHECK-NEXT: ret
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%1 = trunc <4 x i3> <i3 -1, i3 -22, i3 7, i3 8> to <4 x i1>
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%2 = sitofp <4 x i1> %1 to <4 x float>
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ret <4 x float> %2
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}
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