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https://github.com/c64scene-ar/llvm-6502.git
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Use continue in the use-processing loop to make it clear what the early exits
are, simplify logic, and cause things to not be nested as deeply. This also uses MRI->areAliases instead of an explicit loop. No functionality change, just code cleanup. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23296 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
parent
39ee1ac7e5
commit
50ea01ed5b
@ -314,129 +314,137 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM) {
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// Process all of the spilled uses and all non spilled reg references.
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for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
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MachineOperand &MO = MI.getOperand(i);
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if (MO.isRegister() && MO.getReg() &&
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MRegisterInfo::isPhysicalRegister(MO.getReg()))
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if (!MO.isRegister() || MO.getReg() == 0)
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continue; // Ignore non-register operands.
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if (MRegisterInfo::isPhysicalRegister(MO.getReg())) {
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// Ignore physregs for spilling, but remember that it is used by this
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// function.
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PhysRegsUsed[MO.getReg()] = true;
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else if (MO.isRegister() && MO.getReg() &&
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MRegisterInfo::isVirtualRegister(MO.getReg())) {
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unsigned VirtReg = MO.getReg();
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continue;
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}
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assert(MRegisterInfo::isVirtualRegister(MO.getReg()) &&
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"Not a virtual or a physical register?");
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unsigned VirtReg = MO.getReg();
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if (!VRM.hasStackSlot(VirtReg)) {
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// This virtual register was assigned a physreg!
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unsigned Phys = VRM.getPhys(VirtReg);
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PhysRegsUsed[Phys] = true;
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MI.SetMachineOperandReg(i, Phys);
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continue;
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}
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// This virtual register is now known to be a spilled value.
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if (!MO.isUse())
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continue; // Handle defs in the loop below (handle use&def here though)
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if (!VRM.hasStackSlot(VirtReg)) {
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// This virtual register was assigned a physreg!
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unsigned Phys = VRM.getPhys(VirtReg);
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PhysRegsUsed[Phys] = true;
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MI.SetMachineOperandReg(i, Phys);
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} else {
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// Is this virtual register a spilled value?
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if (MO.isUse()) {
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int StackSlot = VRM.getStackSlot(VirtReg);
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unsigned PhysReg;
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// If this is both a def and a use, we need to emit a store to the
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// stack slot after the instruction. Keep track of D&U operands
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// because we are about to change it to a physreg here.
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if (MO.isDef()) {
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// Remember that this was a def-and-use operand, and that the
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// stack slot is live after this instruction executes.
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DefAndUseVReg.push_back(std::make_pair(i, VirtReg));
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}
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int StackSlot = VRM.getStackSlot(VirtReg);
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unsigned PhysReg;
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// Check to see if this stack slot is available.
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std::map<int, unsigned>::iterator SSI =
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SpillSlotsAvailable.find(StackSlot);
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if (SSI != SpillSlotsAvailable.end()) {
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DEBUG(std::cerr << "Reusing SS#" << StackSlot << " from physreg "
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<< MRI->getName(SSI->second) << " for vreg"
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<< VirtReg <<" instead of reloading into physreg "
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<< MRI->getName(VRM.getPhys(VirtReg)) << "\n");
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// If this stack slot value is already available, reuse it!
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PhysReg = SSI->second;
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MI.SetMachineOperandReg(i, PhysReg);
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// Check to see if this stack slot is available.
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std::map<int, unsigned>::iterator SSI =
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SpillSlotsAvailable.find(StackSlot);
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if (SSI != SpillSlotsAvailable.end()) {
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DEBUG(std::cerr << "Reusing SS#" << StackSlot << " from physreg "
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<< MRI->getName(SSI->second) << " for vreg"
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<< VirtReg <<" instead of reloading into physreg "
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<< MRI->getName(VRM.getPhys(VirtReg)) << "\n");
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// If this stack slot value is already available, reuse it!
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PhysReg = SSI->second;
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MI.SetMachineOperandReg(i, PhysReg);
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// The only technical detail we have is that we don't know that
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// PhysReg won't be clobbered by a reloaded stack slot that occurs
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// later in the instruction. In particular, consider 'op V1, V2'.
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// If V1 is available in physreg R0, we would choose to reuse it
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// here, instead of reloading it into the register the allocator
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// indicated (say R1). However, V2 might have to be reloaded
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// later, and it might indicate that it needs to live in R0. When
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// this occurs, we need to have information available that
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// indicates it is safe to use R1 for the reload instead of R0.
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//
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// To further complicate matters, we might conflict with an alias,
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// or R0 and R1 might not be compatible with each other. In this
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// case, we actually insert a reload for V1 in R1, ensuring that
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// we can get at R0 or its alias.
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ReusedOperands.push_back(ReusedOp(i, StackSlot, PhysReg,
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VRM.getPhys(VirtReg)));
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++NumReused;
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} else {
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// Otherwise, reload it and remember that we have it.
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PhysReg = VRM.getPhys(VirtReg);
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// The only technical detail we have is that we don't know that
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// PhysReg won't be clobbered by a reloaded stack slot that occurs
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// later in the instruction. In particular, consider 'op V1, V2'.
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// If V1 is available in physreg R0, we would choose to reuse it
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// here, instead of reloading it into the register the allocator
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// indicated (say R1). However, V2 might have to be reloaded
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// later, and it might indicate that it needs to live in R0. When
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// this occurs, we need to have information available that
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// indicates it is safe to use R1 for the reload instead of R0.
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//
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// To further complicate matters, we might conflict with an alias,
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// or R0 and R1 might not be compatible with each other. In this
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// case, we actually insert a reload for V1 in R1, ensuring that
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// we can get at R0 or its alias.
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ReusedOperands.push_back(ReusedOp(i, StackSlot, PhysReg,
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VRM.getPhys(VirtReg)));
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++NumReused;
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continue;
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}
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// Otherwise, reload it and remember that we have it.
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PhysReg = VRM.getPhys(VirtReg);
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RecheckRegister:
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// Note that, if we reused a register for a previous operand, the
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// register we want to reload into might not actually be
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// available. If this occurs, use the register indicated by the
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// reuser.
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if (!ReusedOperands.empty()) // This is most often empty.
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for (unsigned ro = 0, e = ReusedOperands.size(); ro != e; ++ro)
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if (ReusedOperands[ro].PhysRegReused == PhysReg) {
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// Yup, use the reload register that we didn't use before.
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PhysReg = ReusedOperands[ro].AssignedPhysReg;
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goto RecheckRegister;
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} else {
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ReusedOp &Op = ReusedOperands[ro];
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unsigned PRRU = Op.PhysRegReused;
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for (const unsigned *AS = MRI->getAliasSet(PRRU); *AS; ++AS)
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if (*AS == PhysReg) {
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// Okay, we found out that an alias of a reused register
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// was used. This isn't good because it means we have
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// to undo a previous reuse.
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MRI->loadRegFromStackSlot(MBB, &MI, Op.AssignedPhysReg,
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Op.StackSlot);
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ClobberPhysReg(Op.AssignedPhysReg, SpillSlotsAvailable,
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PhysRegsAvailable);
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// Any stores to this stack slot are not dead anymore.
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MaybeDeadStores.erase(Op.StackSlot);
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MI.SetMachineOperandReg(Op.Operand, Op.AssignedPhysReg);
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PhysRegsAvailable[Op.AssignedPhysReg] = Op.StackSlot;
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SpillSlotsAvailable[Op.StackSlot] = Op.AssignedPhysReg;
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PhysRegsAvailable.erase(Op.PhysRegReused);
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DEBUG(std::cerr << "Remembering SS#" << Op.StackSlot
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<< " in physreg "
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<< MRI->getName(Op.AssignedPhysReg) << "\n");
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++NumLoads;
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DEBUG(std::cerr << '\t' << *prior(MII));
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DEBUG(std::cerr << "Reuse undone!\n");
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ReusedOperands.erase(ReusedOperands.begin()+ro);
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--NumReused;
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goto ContinueReload;
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}
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}
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ContinueReload:
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PhysRegsUsed[PhysReg] = true;
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MRI->loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot);
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// This invalidates PhysReg.
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ClobberPhysReg(PhysReg, SpillSlotsAvailable, PhysRegsAvailable);
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RecheckRegister:
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// Note that, if we reused a register for a previous operand, the
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// register we want to reload into might not actually be
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// available. If this occurs, use the register indicated by the
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// reuser.
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if (!ReusedOperands.empty()) // This is most often empty.
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for (unsigned ro = 0, e = ReusedOperands.size(); ro != e; ++ro)
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if (ReusedOperands[ro].PhysRegReused == PhysReg) {
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// Yup, use the reload register that we didn't use before.
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PhysReg = ReusedOperands[ro].AssignedPhysReg;
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goto RecheckRegister;
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} else {
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ReusedOp &Op = ReusedOperands[ro];
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unsigned PRRU = Op.PhysRegReused;
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if (MRI->areAliases(PRRU, PhysReg)) {
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// Okay, we found out that an alias of a reused register
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// was used. This isn't good because it means we have
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// to undo a previous reuse.
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MRI->loadRegFromStackSlot(MBB, &MI, Op.AssignedPhysReg,
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Op.StackSlot);
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ClobberPhysReg(Op.AssignedPhysReg, SpillSlotsAvailable,
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PhysRegsAvailable);
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// Any stores to this stack slot are not dead anymore.
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MaybeDeadStores.erase(StackSlot);
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MaybeDeadStores.erase(Op.StackSlot);
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MI.SetMachineOperandReg(i, PhysReg);
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PhysRegsAvailable[PhysReg] = StackSlot;
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SpillSlotsAvailable[StackSlot] = PhysReg;
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DEBUG(std::cerr << "Remembering SS#" << StackSlot <<" in physreg "
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<< MRI->getName(PhysReg) << "\n");
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MI.SetMachineOperandReg(Op.Operand, Op.AssignedPhysReg);
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PhysRegsAvailable[Op.AssignedPhysReg] = Op.StackSlot;
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SpillSlotsAvailable[Op.StackSlot] = Op.AssignedPhysReg;
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PhysRegsAvailable.erase(Op.PhysRegReused);
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DEBUG(std::cerr << "Remembering SS#" << Op.StackSlot
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<< " in physreg "
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<< MRI->getName(Op.AssignedPhysReg) << "\n");
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++NumLoads;
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DEBUG(std::cerr << '\t' << *prior(MII));
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}
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// If this is both a def and a use, we need to emit a store to the
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// stack slot after the instruction. Keep track of D&U operands
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// because we already changed it to a physreg here.
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if (MO.isDef()) {
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// Remember that this was a def-and-use operand, and that the
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// stack slot is live after this instruction executes.
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DefAndUseVReg.push_back(std::make_pair(i, VirtReg));
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DEBUG(std::cerr << "Reuse undone!\n");
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ReusedOperands.erase(ReusedOperands.begin()+ro);
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--NumReused;
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goto ContinueReload;
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}
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}
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}
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}
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ContinueReload:
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PhysRegsUsed[PhysReg] = true;
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MRI->loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot);
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// This invalidates PhysReg.
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ClobberPhysReg(PhysReg, SpillSlotsAvailable, PhysRegsAvailable);
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// Any stores to this stack slot are not dead anymore.
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MaybeDeadStores.erase(StackSlot);
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MI.SetMachineOperandReg(i, PhysReg);
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PhysRegsAvailable[PhysReg] = StackSlot;
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SpillSlotsAvailable[StackSlot] = PhysReg;
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DEBUG(std::cerr << "Remembering SS#" << StackSlot <<" in physreg "
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<< MRI->getName(PhysReg) << "\n");
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++NumLoads;
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DEBUG(std::cerr << '\t' << *prior(MII));
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}
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// Loop over all of the implicit defs, clearing them from our available
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