From 50ef90d48e9d1b60416f5c5ec290391305149272 Mon Sep 17 00:00:00 2001
From: Dan Gohman
SDNode *SelectCode(SDOperand N) { +SDNode *SelectCode(SDValue N) { ... - MVT::ValueType NVT = N.Val->getValueType(0); + MVT::ValueType NVT = N.getNode()->getValueType(0); switch (N.getOpcode()) { case ISD::STORE: { switch (NVT) { @@ -1372,21 +1372,21 @@ instruction.
SDNode *Select_ISD_STORE(const SDOperand &N) { - SDOperand Chain = N.getOperand(0); - if (Predicate_store(N.Val)) { - SDOperand N1 = N.getOperand(1); - SDOperand N2 = N.getOperand(2); - SDOperand CPTmp0; - SDOperand CPTmp1; +SDNode *Select_ISD_STORE(const SDValue &N) { + SDValue Chain = N.getOperand(0); + if (Predicate_store(N.getNode())) { + SDValue N1 = N.getOperand(1); + SDValue N2 = N.getOperand(2); + SDValue CPTmp0; + SDValue CPTmp1; // Pattern: (st:void IntRegs:i32:$src, // ADDRrr:i32:$addr)<<P:Predicate_store>> // Emits: (STrr:void ADDRrr:i32:$addr, IntRegs:i32:$src) // Pattern complexity = 13 cost = 1 size = 0 if (SelectADDRrr(N, N2, CPTmp0, CPTmp1) && - N1.Val->getValueType(0) == MVT::i32 && - N2.Val->getValueType(0) == MVT::i32) { + N1.getNode()->getValueType(0) == MVT::i32 && + N2.getNode()->getValueType(0) == MVT::i32) { return Emit_22(N, SP::STrr, CPTmp0, CPTmp1); } ... @@ -1520,8 +1520,8 @@ code, an FP_TO_SINT opcode will call the LowerFP_TO_SINT method:
SDOperand SparcTargetLowering::LowerOperation( - SDOperand Op, SelectionDAG &DAG) { +SDValue SparcTargetLowering::LowerOperation( + SDValue Op, SelectionDAG &DAG) { switch (Op.getOpcode()) { case ISD::FP_TO_SINT: return LowerFP_TO_SINT(Op, DAG); ... @@ -1535,7 +1535,7 @@ register to convert the floating-point value to an integer.
static SDOperand LowerFP_TO_SINT(SDOperand Op, SelectionDAG &DAG) { +static SDValue LowerFP_TO_SINT(SDValue Op, SelectionDAG &DAG) { assert(Op.getValueType() == MVT::i32); Op = DAG.getNode(SPISD::FTOI, MVT::f32, Op.getOperand(0)); return DAG.getNode(ISD::BIT_CONVERT, MVT::i32, Op);