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Revise too-restrictive test CodeGen/PowerPC/tls-pic.ll

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227977 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Schmidt 2015-02-03 16:24:05 +00:00
parent 1123a81009
commit 5114e12df0
1 changed files with 6 additions and 6 deletions
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12
test/CodeGen/PowerPC/tls-pic.ll
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@ -19,32 +19,32 @@ entry:
; OPT0-LABEL: main:
; OPT0: addis [[REG:[0-9]+]], 2, a@got@tlsld@ha
; OPT0-NEXT: addi 3, [[REG]], a@got@tlsld@l
; OPT0: addi 3, [[REG]], a@got@tlsld@l
; OPT0: bl __tls_get_addr(a@tlsld)
; OPT0-NEXT: nop
; OPT0: addis [[REG2:[0-9]+]], 3, a@dtprel@ha
; OPT0-NEXT: addi {{[0-9]+}}, [[REG2]], a@dtprel@l
; OPT0: addi {{[0-9]+}}, [[REG2]], a@dtprel@l
; OPT0-32-LABEL: main
; OPT0-32: addi {{[0-9]+}}, {{[0-9]+}}, a@got@tlsld
; OPT0-32: bl __tls_get_addr(a@tlsld)@PLT
; OPT0-32: addis [[REG:[0-9]+]], 3, a@dtprel@ha
; OPT0-32-NEXT: addi {{[0-9]+}}, [[REG]], a@dtprel@l
; OPT0-32: addi {{[0-9]+}}, [[REG]], a@dtprel@l
; OPT1-32-LABEL: main
; OPT1-32: addi 3, {{[0-9]+}}, a@got@tlsld
; OPT1-32: bl __tls_get_addr(a@tlsld)@PLT
; OPT1-32: addis [[REG:[0-9]+]], 3, a@dtprel@ha
; OPT1-32-NEXT: addi {{[0-9]+}}, [[REG]], a@dtprel@l
; OPT1-32: addi {{[0-9]+}}, [[REG]], a@dtprel@l
; Test peephole optimization for thread-local storage using the
; local dynamic model.
; OPT1-LABEL: main:
; OPT1: addis [[REG:[0-9]+]], 2, a@got@tlsld@ha
; OPT1-NEXT: addi 3, [[REG]], a@got@tlsld@l
; OPT1: addi 3, [[REG]], a@got@tlsld@l
; OPT1: bl __tls_get_addr(a@tlsld)
; OPT1-NEXT: nop
; OPT1: addis [[REG2:[0-9]+]], 3, a@dtprel@ha
; OPT1-NEXT: lwa {{[0-9]+}}, a@dtprel@l([[REG2]])
; OPT1: lwa {{[0-9]+}}, a@dtprel@l([[REG2]])
; Test correct assembly code generation for thread-local storage using
; the general dynamic model.