mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-03-21 03:32:29 +00:00
add a random codegen deficiency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77598 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
20cc4b8cd9
commit
513503961d
@ -546,3 +546,49 @@ We need to fix constant isel for ARMv6t2 to use MOVT.
|
||||
|
||||
Constant island pass should make use of full range SoImm values for LEApcrel.
|
||||
Be careful though as the last attempt caused infinite looping on lencod.
|
||||
|
||||
//===---------------------------------------------------------------------===//
|
||||
|
||||
Predication issue. This function:
|
||||
|
||||
extern unsigned array[ 128 ];
|
||||
int foo( int x ) {
|
||||
int y;
|
||||
y = array[ x & 127 ];
|
||||
if ( x & 128 )
|
||||
y = 123456789 & ( y >> 2 );
|
||||
else
|
||||
y = 123456789 & y;
|
||||
return y;
|
||||
}
|
||||
|
||||
compiles to:
|
||||
|
||||
_foo:
|
||||
and r1, r0, #127
|
||||
ldr r2, LCPI1_0
|
||||
ldr r2, [r2]
|
||||
ldr r1, [r2, +r1, lsl #2]
|
||||
mov r2, r1, lsr #2
|
||||
tst r0, #128
|
||||
moveq r2, r1
|
||||
ldr r0, LCPI1_1
|
||||
and r0, r2, r0
|
||||
bx lr
|
||||
|
||||
It would be better to do something like this, to fold the shift into the
|
||||
conditional move:
|
||||
|
||||
and r1, r0, #127
|
||||
ldr r2, LCPI1_0
|
||||
ldr r2, [r2]
|
||||
ldr r1, [r2, +r1, lsl #2]
|
||||
tst r0, #128
|
||||
movne r1, r1, lsr #2
|
||||
ldr r0, LCPI1_1
|
||||
and r0, r1, r0
|
||||
bx lr
|
||||
|
||||
it saves an instruction and a register.
|
||||
|
||||
//===---------------------------------------------------------------------===//
|
||||
|
Loading…
x
Reference in New Issue
Block a user