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https://github.com/c64scene-ar/llvm-6502.git
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Handle loop with negtive induction variable increment
This patch extend LoopReroll pass to hand the loops which
is similar to the following:
while (len > 1) {
sum4 += buf[len];
sum4 += buf[len-1];
len -= 2;
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243171 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Lawrence Hu
parent
b0fd31a910
commit
5136ca2c6d
@ -166,7 +166,10 @@ namespace {
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typedef SmallVector<Instruction *, 16> SmallInstructionVector;
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typedef SmallSet<Instruction *, 16> SmallInstructionSet;
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// A chain of isomorphic instructions, indentified by a single-use PHI,
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// Map between induction variable and its increment
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DenseMap<Instruction *, int64_t> IVToIncMap;
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// A chain of isomorphic instructions, identified by a single-use PHI
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// representing a reduction. Only the last value may be used outside the
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// loop.
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struct SimpleLoopReduction {
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@ -366,8 +369,10 @@ namespace {
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struct DAGRootTracker {
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DAGRootTracker(LoopReroll *Parent, Loop *L, Instruction *IV,
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ScalarEvolution *SE, AliasAnalysis *AA,
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TargetLibraryInfo *TLI)
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: Parent(Parent), L(L), SE(SE), AA(AA), TLI(TLI), IV(IV) {}
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TargetLibraryInfo *TLI,
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DenseMap<Instruction *, int64_t> &IncrMap)
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: Parent(Parent), L(L), SE(SE), AA(AA), TLI(TLI), IV(IV),
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IVToIncMap(IncrMap) {}
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/// Stage 1: Find all the DAG roots for the induction variable.
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bool findRoots();
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@ -417,7 +422,7 @@ namespace {
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// The loop induction variable.
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Instruction *IV;
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// Loop step amount.
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uint64_t Inc;
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int64_t Inc;
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// Loop reroll count; if Inc == 1, this records the scaling applied
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// to the indvar: a[i*2+0] = ...; a[i*2+1] = ... ;
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// If Inc is not 1, Scale = Inc.
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@ -430,6 +435,8 @@ namespace {
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// they are used in (or specially, IL_All for instructions
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// used in the loop increment mechanism).
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UsesTy Uses;
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// Map between induction variable and its increment
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DenseMap<Instruction *, int64_t> &IVToIncMap;
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};
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void collectPossibleIVs(Loop *L, SmallInstructionVector &PossibleIVs);
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@ -484,13 +491,12 @@ void LoopReroll::collectPossibleIVs(Loop *L,
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continue;
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if (const SCEVConstant *IncSCEV =
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dyn_cast<SCEVConstant>(PHISCEV->getStepRecurrence(*SE))) {
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if (!IncSCEV->getValue()->getValue().isStrictlyPositive())
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const APInt &AInt = IncSCEV->getValue()->getValue().abs();
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if (IncSCEV->getValue()->isZero() || AInt.uge(MaxInc))
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continue;
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if (IncSCEV->getValue()->uge(MaxInc))
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continue;
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DEBUG(dbgs() << "LRR: Possible IV: " << *I << " = " <<
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*PHISCEV << "\n");
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IVToIncMap[I] = IncSCEV->getValue()->getSExtValue();
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DEBUG(dbgs() << "LRR: Possible IV: " << *I << " = " << *PHISCEV
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<< "\n");
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PossibleIVs.push_back(I);
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}
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}
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@ -699,17 +705,11 @@ collectPossibleRoots(Instruction *Base, std::map<int64_t,Instruction*> &Roots) {
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}
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}
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int64_t V = CI->getValue().getSExtValue();
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int64_t V = std::abs(CI->getValue().getSExtValue());
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if (Roots.find(V) != Roots.end())
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// No duplicates, please.
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return false;
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// FIXME: Add support for negative values.
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if (V < 0) {
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DEBUG(dbgs() << "LRR: Aborting due to negative value: " << V << "\n");
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return false;
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}
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Roots[V] = cast<Instruction>(I);
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}
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@ -818,13 +818,10 @@ findRootsBase(Instruction *IVU, SmallInstructionSet SubsumedInsts) {
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}
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bool LoopReroll::DAGRootTracker::findRoots() {
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const SCEVAddRecExpr *RealIVSCEV = cast<SCEVAddRecExpr>(SE->getSCEV(IV));
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Inc = cast<SCEVConstant>(RealIVSCEV->getOperand(1))->
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getValue()->getZExtValue();
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Inc = IVToIncMap[IV];
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assert(RootSets.empty() && "Unclean state!");
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if (Inc == 1) {
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if (std::abs(Inc) == 1) {
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for (auto *IVU : IV->users()) {
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if (isLoopIncrement(IVU, IV))
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LoopIncs.push_back(cast<Instruction>(IVU));
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@ -1267,6 +1264,7 @@ void LoopReroll::DAGRootTracker::replace(const SCEV *IterCount) {
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++J;
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}
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bool Negative = IVToIncMap[IV] < 0;
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const DataLayout &DL = Header->getModule()->getDataLayout();
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// We need to create a new induction variable for each different BaseInst.
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@ -1275,10 +1273,9 @@ void LoopReroll::DAGRootTracker::replace(const SCEV *IterCount) {
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const SCEVAddRecExpr *RealIVSCEV =
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cast<SCEVAddRecExpr>(SE->getSCEV(DRS.BaseInst));
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const SCEV *Start = RealIVSCEV->getStart();
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const SCEVAddRecExpr *H = cast<SCEVAddRecExpr>
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(SE->getAddRecExpr(Start,
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SE->getConstant(RealIVSCEV->getType(), 1),
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L, SCEV::FlagAnyWrap));
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const SCEVAddRecExpr *H = cast<SCEVAddRecExpr>(SE->getAddRecExpr(
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Start, SE->getConstant(RealIVSCEV->getType(), Negative ? -1 : 1), L,
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SCEV::FlagAnyWrap));
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{ // Limit the lifetime of SCEVExpander.
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SCEVExpander Expander(*SE, DL, "reroll");
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Value *NewIV = Expander.expandCodeFor(H, IV->getType(), Header->begin());
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@ -1294,8 +1291,8 @@ void LoopReroll::DAGRootTracker::replace(const SCEV *IterCount) {
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const SCEV *ICSCEV = RealIVSCEV->evaluateAtIteration(IterCount, *SE);
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// Iteration count SCEV minus 1
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const SCEV *ICMinus1SCEV =
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SE->getMinusSCEV(ICSCEV, SE->getConstant(ICSCEV->getType(), 1));
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const SCEV *ICMinus1SCEV = SE->getMinusSCEV(
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ICSCEV, SE->getConstant(ICSCEV->getType(), Negative ? -1 : 1));
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Value *ICMinus1; // Iteration count minus 1
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if (isa<SCEVConstant>(ICMinus1SCEV)) {
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@ -1444,7 +1441,7 @@ void LoopReroll::ReductionTracker::replaceSelected() {
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bool LoopReroll::reroll(Instruction *IV, Loop *L, BasicBlock *Header,
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const SCEV *IterCount,
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ReductionTracker &Reductions) {
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DAGRootTracker DAGRoots(this, L, IV, SE, AA, TLI);
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DAGRootTracker DAGRoots(this, L, IV, SE, AA, TLI, IVToIncMap);
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if (!DAGRoots.findRoots())
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return false;
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@ -1497,6 +1494,7 @@ bool LoopReroll::runOnLoop(Loop *L, LPPassManager &LPM) {
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// First, we need to find the induction variable with respect to which we can
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// reroll (there may be several possible options).
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SmallInstructionVector PossibleIVs;
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IVToIncMap.clear();
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collectPossibleIVs(L, PossibleIVs);
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if (PossibleIVs.empty()) {
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48
test/Transforms/LoopReroll/negative.ll
Normal file
48
test/Transforms/LoopReroll/negative.ll
Normal file
@ -0,0 +1,48 @@
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; RUN: opt -S -loop-reroll %s | FileCheck %s
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target triple = "aarch64--linux-gnu"
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@buf = global [16 x i8] c"\0A\0A\0A\0A\0A\0A\0A\0A\0A\0A\0A\0A\0A\0A\0A\0A", align 1
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define i32 @test1(i32 %len, i8* nocapture readonly %buf) #0 {
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entry:
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%cmp.13 = icmp sgt i32 %len, 1
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br i1 %cmp.13, label %while.body.lr.ph, label %while.end
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while.body.lr.ph: ; preds = %entry
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br label %while.body
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while.body:
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;CHECK-LABEL: while.body:
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;CHECK-NEXT: %indvar = phi i32 [ %indvar.next, %while.body ], [ 0, %while.body.lr.ph ]
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;CHECK-NEXT: %sum4.015 = phi i64 [ 0, %while.body.lr.ph ], [ %add, %while.body ]
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;CHECK-NOT: %sub5 = add nsw i32 %len.addr.014, -1
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;CHECK-NOT: %sub5 = add nsw i32 %len.addr.014, -2
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;CHECK: br i1 %exitcond, label %while.cond.while.end_crit_edge, label %while.body
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%sum4.015 = phi i64 [ 0, %while.body.lr.ph ], [ %add4, %while.body ]
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%len.addr.014 = phi i32 [ %len, %while.body.lr.ph ], [ %sub5, %while.body ]
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%idxprom = sext i32 %len.addr.014 to i64
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%arrayidx = getelementptr inbounds i8, i8* %buf, i64 %idxprom
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%0 = load i8, i8* %arrayidx, align 1
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%conv = zext i8 %0 to i64
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%add = add i64 %conv, %sum4.015
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%sub = add nsw i32 %len.addr.014, -1
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%idxprom1 = sext i32 %sub to i64
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%arrayidx2 = getelementptr inbounds i8, i8* %buf, i64 %idxprom1
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%1 = load i8, i8* %arrayidx2, align 1
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%conv3 = zext i8 %1 to i64
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%add4 = add i64 %add, %conv3
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%sub5 = add nsw i32 %len.addr.014, -2
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%cmp = icmp sgt i32 %sub5, 1
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br i1 %cmp, label %while.body, label %while.cond.while.end_crit_edge
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while.cond.while.end_crit_edge: ; preds = %while.body
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%add4.lcssa = phi i64 [ %add4, %while.body ]
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%phitmp = trunc i64 %add4.lcssa to i32
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br label %while.end
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while.end: ; preds = %while.cond.while.end_crit_edge, %entry
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%sum4.0.lcssa = phi i32 [ %phitmp, %while.cond.while.end_crit_edge ], [ 0, %entry ]
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ret i32 %sum4.0.lcssa
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unreachable
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}
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