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If the insert_subreg source is <undef>, insert an implicit_def instead of a copy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78141 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -254,7 +254,13 @@ bool LowerSubregsInstructionPass::LowerInsert(MachineInstr *MI) {
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// Insert sub-register copy
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const TargetRegisterClass *TRC0= TRI.getPhysicalRegisterRegClass(DstSubReg);
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const TargetRegisterClass *TRC1= TRI.getPhysicalRegisterRegClass(InsReg);
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TII.copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC0, TRC1);
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if (MI->getOperand(2).isUndef())
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// If the source register being inserted is undef, then this becomes an
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// implicit_def.
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BuildMI(*MBB, MI, MI->getDebugLoc(),
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TII.get(TargetInstrInfo::IMPLICIT_DEF), DstSubReg);
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else
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TII.copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC0, TRC1);
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MachineBasicBlock::iterator CopyMI = MI;
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--CopyMI;
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@ -270,7 +276,7 @@ bool LowerSubregsInstructionPass::LowerInsert(MachineInstr *MI) {
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}
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// Make sure the inserted register gets killed
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if (MI->getOperand(2).isKill())
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if (MI->getOperand(2).isKill() && !MI->getOperand(2).isUndef())
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TransferKillFlag(MI, InsReg, TRI);
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}
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34
test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll
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34
test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll
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@ -0,0 +1,34 @@
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; RUN: llvm-as < %s | llc -mtriple=thumbv7-apple-darwin9 -mattr=+neon,+neonfp
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; RUN: llvm-as < %s | llc -mtriple=thumbv7-apple-darwin9 -mattr=+neon,+neonfp | grep fcpys | count 1
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; rdar://7117307
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%struct.Hosp = type { i32, i32, i32, %struct.List, %struct.List, %struct.List, %struct.List }
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%struct.List = type { %struct.List*, %struct.Patient*, %struct.List* }
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%struct.Patient = type { i32, i32, i32, %struct.Village* }
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%struct.Results = type { float, float, float }
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%struct.Village = type { [4 x %struct.Village*], %struct.Village*, %struct.List, %struct.Hosp, i32, i32 }
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define arm_apcscc void @get_results(%struct.Results* noalias nocapture sret %agg.result, %struct.Village* %village) nounwind {
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entry:
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br i1 undef, label %bb, label %bb6.preheader
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bb6.preheader: ; preds = %entry
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call void @llvm.memcpy.i32(i8* undef, i8* undef, i32 12, i32 4)
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br i1 undef, label %bb15, label %bb13
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bb: ; preds = %entry
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ret void
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bb13: ; preds = %bb13, %bb6.preheader
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%0 = fadd float undef, undef ; <float> [#uses=1]
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%1 = fadd float undef, 1.000000e+00 ; <float> [#uses=1]
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br i1 undef, label %bb15, label %bb13
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bb15: ; preds = %bb13, %bb6.preheader
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%r1.0.0.lcssa = phi float [ 0.000000e+00, %bb6.preheader ], [ %1, %bb13 ] ; <float> [#uses=1]
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%r1.1.0.lcssa = phi float [ undef, %bb6.preheader ], [ %0, %bb13 ] ; <float> [#uses=0]
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store float %r1.0.0.lcssa, float* undef, align 4
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ret void
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}
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declare void @llvm.memcpy.i32(i8* nocapture, i8* nocapture, i32, i32) nounwind
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