move target-independent opcodes out of TargetInstrInfo

into TargetOpcodes.h.  #include the new TargetOpcodes.h
into MachineInstr.  Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the 
codebase.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95687 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2010-02-09 19:54:29 +00:00
parent 4152778605
commit 518bb53485
63 changed files with 344 additions and 352 deletions
+3 -3
View File
@@ -35,7 +35,7 @@ void CodeEmitterGen::reverseBits(std::vector<Record*> &Insts) {
R->getName() == "IMPLICIT_DEF" ||
R->getName() == "SUBREG_TO_REG" ||
R->getName() == "COPY_TO_REGCLASS" ||
R->getName() == "DEBUG_VALUE") continue;
R->getName() == "DBG_VALUE") continue;
BitsInit *BI = R->getValueAsBitsInit("Inst");
@@ -113,7 +113,7 @@ void CodeEmitterGen::run(raw_ostream &o) {
R->getName() == "IMPLICIT_DEF" ||
R->getName() == "SUBREG_TO_REG" ||
R->getName() == "COPY_TO_REGCLASS" ||
R->getName() == "DEBUG_VALUE") {
R->getName() == "DBG_VALUE") {
o << " 0U,\n";
continue;
}
@@ -152,7 +152,7 @@ void CodeEmitterGen::run(raw_ostream &o) {
InstName == "IMPLICIT_DEF" ||
InstName == "SUBREG_TO_REG" ||
InstName == "COPY_TO_REGCLASS" ||
InstName == "DEBUG_VALUE") continue;
InstName == "DBG_VALUE") continue;
BitsInit *BI = R->getValueAsBitsInit("Inst");
const std::vector<RecordVal> &Vals = R->getValues();