diff --git a/lib/Target/PowerPC/PPCHazardRecognizers.cpp b/lib/Target/PowerPC/PPCHazardRecognizers.cpp index d2f81c673f9..43caf6c8186 100644 --- a/lib/Target/PowerPC/PPCHazardRecognizers.cpp +++ b/lib/Target/PowerPC/PPCHazardRecognizers.cpp @@ -170,6 +170,8 @@ getHazardType(SDNode *Node) { default: assert(0 && "Unknown load!"); case PPC::LBZ: case PPC::LBZX: + case PPC::LBZ8: + case PPC::LBZX8: case PPC::LVEBX: LoadSize = 1; break; @@ -179,6 +181,10 @@ getHazardType(SDNode *Node) { case PPC::LHZX: case PPC::LVEHX: case PPC::LHBRX: + case PPC::LHA8: + case PPC::LHAX8: + case PPC::LHZ8: + case PPC::LHZX8: LoadSize = 2; break; case PPC::LFS: @@ -190,6 +196,8 @@ getHazardType(SDNode *Node) { case PPC::LWAX: case PPC::LVEWX: case PPC::LWBRX: + case PPC::LWZ8: + case PPC::LWZX8: LoadSize = 4; break; case PPC::LFD: @@ -227,13 +235,17 @@ void PPCHazardRecognizer970::EmitInstruction(SDNode *Node) { unsigned ThisStoreSize; switch (Opcode) { default: assert(0 && "Unknown store instruction!"); - case PPC::STBX: case PPC::STB: + case PPC::STBX: + case PPC::STB8: + case PPC::STBX8: case PPC::STVEBX: ThisStoreSize = 1; break; - case PPC::STHX: case PPC::STH: + case PPC::STHX: + case PPC::STH8: + case PPC::STHX8: case PPC::STVEHX: case PPC::STHBRX: ThisStoreSize = 2; @@ -244,6 +256,8 @@ void PPCHazardRecognizer970::EmitInstruction(SDNode *Node) { case PPC::STWX: case PPC::STWUX: case PPC::STW: + case PPC::STW8: + case PPC::STWX8: case PPC::STVEWX: case PPC::STFIWX: case PPC::STWBRX: diff --git a/lib/Target/PowerPC/PPCInstr64Bit.td b/lib/Target/PowerPC/PPCInstr64Bit.td index 46cc7d7fad9..f870391d1ab 100644 --- a/lib/Target/PowerPC/PPCInstr64Bit.td +++ b/lib/Target/PowerPC/PPCInstr64Bit.td @@ -230,26 +230,57 @@ def RLDICR : MDForm_1<30, 1, let isLoad = 1, PPC970_Unit = 2 in { +// Sign extending loads. +def LHA8: DForm_1<42, (ops G8RC:$rD, memri:$src), + "lha $rD, $src", LdStLHA, + [(set G8RC:$rD, (sextload iaddr:$src, i16))]>, + PPC970_DGroup_Cracked; def LWA : DSForm_1<58, 2, (ops G8RC:$rD, memrix:$src), "lwa $rD, $src", LdStLWA, [(set G8RC:$rD, (sextload ixaddr:$src, i32))]>, isPPC64, PPC970_DGroup_Cracked; -def LD : DSForm_2<58, 0, (ops G8RC:$rD, memrix:$src), - "ld $rD, $src", LdStLD, - [(set G8RC:$rD, (load ixaddr:$src))]>, isPPC64; - +def LHAX8: XForm_1<31, 343, (ops G8RC:$rD, memrr:$src), + "lhax $rD, $src", LdStLHA, + [(set G8RC:$rD, (sextload xaddr:$src, i16))]>, + PPC970_DGroup_Cracked; def LWAX : XForm_1<31, 341, (ops G8RC:$rD, memrr:$src), "lwax $rD, $src", LdStLHA, [(set G8RC:$rD, (sextload xaddr:$src, i32))]>, isPPC64, PPC970_DGroup_Cracked; -def LDX : XForm_1<31, 21, (ops G8RC:$rD, memrr:$src), - "ldx $rD, $src", LdStLD, - [(set G8RC:$rD, (load xaddr:$src))]>, isPPC64; + +// Zero extending loads. +def LBZ8 : DForm_1<34, (ops G8RC:$rD, memri:$src), + "lbz $rD, $src", LdStGeneral, + [(set G8RC:$rD, (zextload iaddr:$src, i8))]>; +def LHZ8 : DForm_1<40, (ops G8RC:$rD, memri:$src), + "lhz $rD, $src", LdStGeneral, + [(set G8RC:$rD, (zextload iaddr:$src, i16))]>; def LWZ8 : DForm_1<32, (ops G8RC:$rD, memri:$src), "lwz $rD, $src", LdStGeneral, [(set G8RC:$rD, (zextload iaddr:$src, i32))]>, isPPC64; + +def LBZX8 : XForm_1<31, 87, (ops G8RC:$rD, memrr:$src), + "lbzx $rD, $src", LdStGeneral, + [(set G8RC:$rD, (zextload xaddr:$src, i8))]>; +def LHZX8 : XForm_1<31, 279, (ops G8RC:$rD, memrr:$src), + "lhzx $rD, $src", LdStGeneral, + [(set G8RC:$rD, (zextload xaddr:$src, i16))]>; +def LWZX8 : XForm_1<31, 23, (ops G8RC:$rD, memrr:$src), + "lwzx $rD, $src", LdStGeneral, + [(set G8RC:$rD, (zextload xaddr:$src, i32))]>; + + +// Full 8-byte loads. +def LD : DSForm_2<58, 0, (ops G8RC:$rD, memrix:$src), + "ld $rD, $src", LdStLD, + [(set G8RC:$rD, (load ixaddr:$src))]>, isPPC64; +def LDX : XForm_1<31, 21, (ops G8RC:$rD, memrr:$src), + "ldx $rD, $src", LdStLD, + [(set G8RC:$rD, (load xaddr:$src))]>, isPPC64; } + let isStore = 1, noResults = 1, PPC970_Unit = 2 in { +// Normal stores. def STD : DSForm_2<62, 0, (ops G8RC:$rS, memrix:$dst), "std $rS, $dst", LdStSTD, [(store G8RC:$rS, ixaddr:$dst)]>, isPPC64; @@ -269,6 +300,29 @@ def STDX_32 : XForm_8<31, 149, (ops GPRC:$rT, memrr:$dst), "stdx $rT, $dst", LdStSTD, [(PPCstd_32 GPRC:$rT, xaddr:$dst)]>, isPPC64, PPC970_DGroup_Cracked; + +// Truncating stores. +def STB8 : DForm_3<38, (ops G8RC:$rS, memri:$src), + "stb $rS, $src", LdStGeneral, + [(truncstore G8RC:$rS, iaddr:$src, i8)]>; +def STH8 : DForm_3<44, (ops G8RC:$rS, memri:$src), + "sth $rS, $src", LdStGeneral, + [(truncstore G8RC:$rS, iaddr:$src, i16)]>; +def STW8 : DForm_3<36, (ops G8RC:$rS, memri:$src), + "stw $rS, $src", LdStGeneral, + [(truncstore G8RC:$rS, iaddr:$src, i32)]>; +def STBX8 : XForm_8<31, 215, (ops G8RC:$rS, memrr:$dst), + "stbx $rS, $dst", LdStGeneral, + [(truncstore G8RC:$rS, xaddr:$dst, i8)]>, + PPC970_DGroup_Cracked; +def STHX8 : XForm_8<31, 407, (ops G8RC:$rS, memrr:$dst), + "sthx $rS, $dst", LdStGeneral, + [(truncstore G8RC:$rS, xaddr:$dst, i16)]>, + PPC970_DGroup_Cracked; +def STWX8 : XForm_8<31, 151, (ops G8RC:$rS, memrr:$dst), + "stwx $rS, $dst", LdStGeneral, + [(truncstore G8RC:$rS, xaddr:$dst, i32)]>, + PPC970_DGroup_Cracked; } @@ -342,6 +396,28 @@ def : Pat<(i64 (anyext GPRC:$in)), def : Pat<(i32 (trunc G8RC:$in)), (OR8To4 G8RC:$in, G8RC:$in)>; +// Extending loads with i64 targets. +def : Pat<(zextload iaddr:$src, i1), + (LBZ8 iaddr:$src)>; +def : Pat<(zextload xaddr:$src, i1), + (LBZX8 xaddr:$src)>; +def : Pat<(extload iaddr:$src, i1), + (LBZ8 iaddr:$src)>; +def : Pat<(extload xaddr:$src, i1), + (LBZX8 xaddr:$src)>; +def : Pat<(extload iaddr:$src, i8), + (LBZ8 iaddr:$src)>; +def : Pat<(extload xaddr:$src, i8), + (LBZX8 xaddr:$src)>; +def : Pat<(extload iaddr:$src, i16), + (LHZ8 iaddr:$src)>; +def : Pat<(extload xaddr:$src, i16), + (LHZX8 xaddr:$src)>; +def : Pat<(extload iaddr:$src, i32), + (LWZ8 iaddr:$src)>; +def : Pat<(extload xaddr:$src, i32), + (LWZX8 xaddr:$src)>; + // SHL/SRL def : Pat<(shl G8RC:$in, (i32 imm:$imm)), (RLDICR G8RC:$in, imm:$imm, (SHL64 imm:$imm))>;