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[x86] Add JMP_2 and other 16-bit PC-relative branch instructions
Mark them as requiring 16-bit mode for now, since we don't yet have relaxation support for FK_Data_2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198762 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -52,6 +52,9 @@ let isTerminator = 1, isReturn = 1, isBarrier = 1,
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let isBarrier = 1, isBranch = 1, isTerminator = 1, SchedRW = [WriteJump] in {
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def JMP_4 : Ii32PCRel<0xE9, RawFrm, (outs), (ins brtarget:$dst),
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"jmp\t$dst", [(br bb:$dst)], IIC_JMP_REL>, OpSize16;
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def JMP_2 : Ii16PCRel<0xE9, RawFrm, (outs), (ins brtarget:$dst),
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"jmp\t$dst", [(br bb:$dst)], IIC_JMP_REL>, OpSize,
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Requires<[In16BitMode]>;
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let hasSideEffects = 0 in
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def JMP_1 : Ii8PCRel<0xEB, RawFrm, (outs), (ins brtarget8:$dst),
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"jmp\t$dst", [], IIC_JMP_REL>;
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@ -63,6 +66,9 @@ let isBranch = 1, isTerminator = 1, Uses = [EFLAGS], SchedRW = [WriteJump] in {
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let hasSideEffects = 0 in
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def _1 : Ii8PCRel <opc1, RawFrm, (outs), (ins brtarget8:$dst), asm, [],
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IIC_Jcc>;
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def _2 : Ii16PCRel<opc4, RawFrm, (outs), (ins brtarget:$dst), asm,
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[(X86brcond bb:$dst, Cond, EFLAGS)], IIC_Jcc>, OpSize,
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TB, Requires<[In16BitMode]>;
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def _4 : Ii32PCRel<opc4, RawFrm, (outs), (ins brtarget:$dst), asm,
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[(X86brcond bb:$dst, Cond, EFLAGS)], IIC_Jcc>, TB,
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OpSize16;
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