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Reduce code size by using a second switch statement to avoid extra calls to SelectAtomic64. Also catch cases where SelectAtomic64 fails.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159503 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2012-07-01 02:55:34 +00:00
parent 65b382cf91
commit 51e89c0d6a
1 changed files with 19 additions and 9 deletions
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28
lib/Target/X86/X86ISelDAGToDAG.cpp
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@ -2014,7 +2014,7 @@ SDNode *X86DAGToDAGISel::Select(SDNode *Node) {
case Intrinsic::x86_avx2_gather_q_d_256: { case Intrinsic::x86_avx2_gather_q_d_256: {
unsigned Opc; unsigned Opc;
switch (IntNo) { switch (IntNo) {
default: llvm_unreachable("Impossible intrinsic."); default: llvm_unreachable("Impossible intrinsic");
case Intrinsic::x86_avx2_gather_d_pd: Opc = X86::VGATHERDPDrm; break; case Intrinsic::x86_avx2_gather_d_pd: Opc = X86::VGATHERDPDrm; break;
case Intrinsic::x86_avx2_gather_d_pd_256: Opc = X86::VGATHERDPDYrm; break; case Intrinsic::x86_avx2_gather_d_pd_256: Opc = X86::VGATHERDPDYrm; break;
case Intrinsic::x86_avx2_gather_q_pd: Opc = X86::VGATHERQPDrm; break; case Intrinsic::x86_avx2_gather_q_pd: Opc = X86::VGATHERQPDrm; break;
@ -2043,20 +2043,30 @@ SDNode *X86DAGToDAGISel::Select(SDNode *Node) {
case X86ISD::GlobalBaseReg: case X86ISD::GlobalBaseReg:
return getGlobalBaseReg(); return getGlobalBaseReg();
case X86ISD::ATOMOR64_DAG: case X86ISD::ATOMOR64_DAG:
return SelectAtomic64(Node, X86::ATOMOR6432);
case X86ISD::ATOMXOR64_DAG: case X86ISD::ATOMXOR64_DAG:
return SelectAtomic64(Node, X86::ATOMXOR6432);
case X86ISD::ATOMADD64_DAG: case X86ISD::ATOMADD64_DAG:
return SelectAtomic64(Node, X86::ATOMADD6432);
case X86ISD::ATOMSUB64_DAG: case X86ISD::ATOMSUB64_DAG:
return SelectAtomic64(Node, X86::ATOMSUB6432);
case X86ISD::ATOMNAND64_DAG: case X86ISD::ATOMNAND64_DAG:
return SelectAtomic64(Node, X86::ATOMNAND6432);
case X86ISD::ATOMAND64_DAG: case X86ISD::ATOMAND64_DAG:
return SelectAtomic64(Node, X86::ATOMAND6432); case X86ISD::ATOMSWAP64_DAG: {
case X86ISD::ATOMSWAP64_DAG: unsigned Opc;
return SelectAtomic64(Node, X86::ATOMSWAP6432); switch (Opcode) {
default: llvm_unreachable("Impossible intrinsic");
case X86ISD::ATOMOR64_DAG: Opc = X86::ATOMOR6432; break;
case X86ISD::ATOMXOR64_DAG: Opc = X86::ATOMXOR6432; break;
case X86ISD::ATOMADD64_DAG: Opc = X86::ATOMADD6432; break;
case X86ISD::ATOMSUB64_DAG: Opc = X86::ATOMSUB6432; break;
case X86ISD::ATOMNAND64_DAG: Opc = X86::ATOMNAND6432; break;
case X86ISD::ATOMAND64_DAG: Opc = X86::ATOMAND6432; break;
case X86ISD::ATOMSWAP64_DAG: Opc = X86::ATOMSWAP6432; break;
}
SDNode *RetVal = SelectAtomic64(Node, Opc);
if (RetVal)
return RetVal;
break;
}
case ISD::ATOMIC_LOAD_ADD: { case ISD::ATOMIC_LOAD_ADD: {
SDNode *RetVal = SelectAtomicLoadAdd(Node, NVT); SDNode *RetVal = SelectAtomicLoadAdd(Node, NVT);