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Attempt to fix dynamic stack realignment for thumb1 functions. It is in fact
useful if an optimization assumes the stack has been realigned. Credit to Eli for his assistance. rdar://10043857 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140924 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -626,13 +626,10 @@ bool ARMBaseRegisterInfo::hasBasePointer(const MachineFunction &MF) const {
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bool ARMBaseRegisterInfo::canRealignStack(const MachineFunction &MF) const {
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bool ARMBaseRegisterInfo::canRealignStack(const MachineFunction &MF) const {
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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const ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
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// We can't realign the stack if:
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// We can't realign the stack if:
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// 1. Dynamic stack realignment is explicitly disabled,
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// 1. Dynamic stack realignment is explicitly disabled,
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// 2. This is a Thumb1 function (it's not useful, so we don't bother), or
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// 2. There are VLAs in the function and the base pointer is disabled.
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// 3. There are VLAs in the function and the base pointer is disabled.
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return (RealignStack && (!MFI->hasVarSizedObjects() || EnableBasePointer));
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return (RealignStack && !AFI->isThumb1OnlyFunction() &&
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(!MFI->hasVarSizedObjects() || EnableBasePointer));
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}
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}
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bool ARMBaseRegisterInfo::
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bool ARMBaseRegisterInfo::
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@ -881,10 +881,12 @@ ARMFrameLowering::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
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// for sure what the stack size will be, but for this, an estimate is good
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// for sure what the stack size will be, but for this, an estimate is good
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// enough. If there anything changes it, it'll be a spill, which implies
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// enough. If there anything changes it, it'll be a spill, which implies
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// we've used all the registers and so R4 is already used, so not marking
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// we've used all the registers and so R4 is already used, so not marking
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// it here will be OK.
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// it here will be OK. Also spill R4 if Thumb1 function requires stack
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// realignment.
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// FIXME: It will be better just to find spare register here.
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// FIXME: It will be better just to find spare register here.
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unsigned StackSize = estimateStackSize(MF);
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unsigned StackSize = estimateStackSize(MF);
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if (MFI->hasVarSizedObjects() || StackSize > 508)
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if (MFI->hasVarSizedObjects() || RegInfo->needsStackRealignment(MF) ||
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StackSize > 508)
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MF.getRegInfo().setPhysRegUsed(ARM::R4);
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MF.getRegInfo().setPhysRegUsed(ARM::R4);
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}
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}
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@ -155,6 +155,27 @@ void Thumb1FrameLowering::emitPrologue(MachineFunction &MF) const {
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AFI->setGPRCalleeSavedArea2Size(GPRCS2Size);
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AFI->setGPRCalleeSavedArea2Size(GPRCS2Size);
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AFI->setDPRCalleeSavedAreaSize(DPRCSSize);
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AFI->setDPRCalleeSavedAreaSize(DPRCSSize);
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if (RegInfo->needsStackRealignment(MF)) {
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// We cannot use sp as source/dest register here, thus we're emitting the
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// following sequence:
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// mov r4, sp
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// lsrs r4, r4, Log2MaxAlign
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// lsls r4, r4, Log2MaxAlign
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// mov sp, r4
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unsigned MaxAlign = MFI->getMaxAlignment();
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unsigned Log2MaxAlign = Log2_32(MaxAlign);
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AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), ARM::R4)
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.addReg(ARM::SP, RegState::Kill));
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AddDefaultPred(AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tLSRri), ARM::R4))
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.addReg(ARM::R4, RegState::Kill)
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.addImm(Log2MaxAlign));
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AddDefaultPred(AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tLSLri), ARM::R4))
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.addReg(ARM::R4, RegState::Kill)
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.addImm(Log2MaxAlign));
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AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), ARM::SP)
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.addReg(ARM::R4, RegState::Kill));
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}
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// If we need a base pointer, set it up here. It's whatever the value
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// If we need a base pointer, set it up here. It's whatever the value
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// of the stack pointer is at this point. Any variable size objects
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// of the stack pointer is at this point. Any variable size objects
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// will be allocated after this, so we can still use the base pointer
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// will be allocated after this, so we can still use the base pointer
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