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Add a new x86 specific instruction flag to force some isCodeGenOnly instructions to go through to the disassembler tables without resorting to string matches. Apply flag to all _REV instructions.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198543 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper
2014-01-05 04:17:28 +00:00
parent 272690897e
commit 527f132627
8 changed files with 25 additions and 12 deletions
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3
utils/TableGen/X86RecognizableInstr.cpp
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@@ -248,6 +248,7 @@ RecognizableInstr::RecognizableInstr(DisassemblerTables &tables,
HasEVEX_B = Rec->getValueAsBit("hasEVEX_B");
HasLockPrefix = Rec->getValueAsBit("hasLockPrefix");
IsCodeGenOnly = Rec->getValueAsBit("isCodeGenOnly");
ForceDisassemble = Rec->getValueAsBit("ForceDisassemble");
Name = Rec->getName();
AsmString = Rec->getValueAsString("AsmString");
@@ -483,7 +484,7 @@ RecognizableInstr::filter_ret RecognizableInstr::filter() const {
assert(Rec->isSubClassOf("X86Inst") && "Can only filter X86 instructions");
if (Form == X86Local::Pseudo ||
(IsCodeGenOnly && Name.find("_REV") == Name.npos &&
(IsCodeGenOnly && !ForceDisassemble &&
Name.find("INC32") == Name.npos && Name.find("DEC32") == Name.npos))
return FILTER_STRONG;