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Code clean up; no functionality change.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121176 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2010-12-07 20:11:46 +00:00
parent c4ba09da60
commit 52f21e35e8
1 changed files with 14 additions and 16 deletions
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30
lib/Target/ARM/ARMFrameInfo.cpp
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@ -529,7 +529,6 @@ void ARMFrameInfo::emitPushInst(MachineBasicBlock &MBB,
Regs.push_back(std::make_pair(Reg, isKill)); Regs.push_back(std::make_pair(Reg, isKill));
} }
// It's illegal to emit push instruction without operands.
if (!Regs.empty()) { if (!Regs.empty()) {
MachineInstrBuilder MIB = AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(Opc), MachineInstrBuilder MIB = AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(Opc),
ARM::SP).addReg(ARM::SP)); ARM::SP).addReg(ARM::SP));
@ -568,31 +567,30 @@ void ARMFrameInfo::emitPopInst(MachineBasicBlock &MBB,
ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>(); ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
DebugLoc DL = MI->getDebugLoc(); DebugLoc DL = MI->getDebugLoc();
MachineInstrBuilder MIB = BuildMI(MF, DL, TII.get(Opc)); bool DeleteRet = false;
MIB.addReg(ARM::SP, getDefRegState(true)); SmallVector<unsigned, 4> Regs;
MIB.addReg(ARM::SP);
AddDefaultPred(MIB);
bool NumRegs = false;
for (unsigned i = CSI.size(); i != 0; --i) { for (unsigned i = CSI.size(); i != 0; --i) {
unsigned Reg = CSI[i-1].getReg(); unsigned Reg = CSI[i-1].getReg();
if (!(Func)(Reg, STI.isTargetDarwin())) continue; if (!(Func)(Reg, STI.isTargetDarwin())) continue;
if (Reg == ARM::LR && !isVarArg) { if (Reg == ARM::LR && !isVarArg) {
Reg = ARM::PC; Reg = ARM::PC;
unsigned Opc = AFI->isThumbFunction() ? ARM::t2LDMIA_RET : ARM::LDMIA_RET; Opc = AFI->isThumbFunction() ? ARM::t2LDMIA_RET : ARM::LDMIA_RET;
(*MIB).setDesc(TII.get(Opc)); // Fold the return instruction into the LDM.
MI = MBB.erase(MI); DeleteRet = true;
} }
MIB.addReg(Reg, RegState::Define); Regs.push_back(Reg);
NumRegs = true;
} }
// It's illegal to emit pop instruction without operands. if (!Regs.empty()) {
if (NumRegs) MachineInstrBuilder MIB = AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(Opc),
MBB.insert(MI, &*MIB); ARM::SP).addReg(ARM::SP));
else for (unsigned i = 0, e = Regs.size(); i < e; ++i)
MF.DeleteMachineInstr(MIB); MIB.addReg(Regs[i], getDefRegState(true));
if (DeleteRet)
MI->eraseFromParent();
}
} }
bool ARMFrameInfo::restoreCalleeSavedRegisters(MachineBasicBlock &MBB, bool ARMFrameInfo::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,