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update a couple of references to SSARegMap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45468 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -719,8 +719,7 @@ comes from.</p>
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corresponds one-to-one with the LLVM function input to the instruction selector.
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In addition to a list of basic blocks, the <tt>MachineFunction</tt> contains a
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a <tt>MachineConstantPool</tt>, a <tt>MachineFrameInfo</tt>, a
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<tt>MachineFunctionInfo</tt>, a <tt>SSARegMap</tt>, and a set of live in and
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live out registers for the function. See
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<tt>MachineFunctionInfo</tt>, and a <tt>MachineRegisterInfo</tt>. See
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<tt>include/llvm/CodeGen/MachineFunction.h</tt> for more information.</p>
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</div>
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@@ -1313,8 +1312,8 @@ bool RegMapping_Fer::compatible_class(MachineFunction &mf,
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unsigned p_reg) {
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assert(MRegisterInfo::isPhysicalRegister(p_reg) &&
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"Target register must be physical");
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const TargetRegisterClass *trc = mf.getSSARegMap()->getRegClass(v_reg);
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return trc->contains(p_reg);
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const TargetRegisterClass *trc = mf.getRegInfo().getRegClass(v_reg);
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return trc->contains(p_reg);
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}
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</pre>
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</div>
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@@ -1343,7 +1342,7 @@ register. Whereas physical registers are statically defined in a
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<tt>TargetRegisterInfo.td</tt> file and cannot be created by the
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application developer, that is not the case with virtual registers.
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In order to create new virtual registers, use the method
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<tt>SSARegMap::createVirtualRegister()</tt>. This method will return a
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<tt>MachineRegisterInfo::createVirtualRegister()</tt>. This method will return a
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virtual register with the highest code.
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</p>
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