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Fix PR3149. If an early clobber def is a physical register and it is tied to an input operand, it effectively extends the live range of the physical register. Currently we do not have a good way to represent this.
172 %ECX<def> = MOV32rr %reg1039<kill> 180 INLINEASM <es:subl $5,$1 sbbl $3,$0>, 10, %EAX<def>, 14, %ECX<earlyclobber,def>, 9, %EAX<kill>, 36, <fi#0>, 1, %reg0, 0, 9, %ECX<kill>, 36, <fi#1>, 1, %reg0, 0 188 %EAX<def> = MOV32rr %EAX<kill> 196 %ECX<def> = MOV32rr %ECX<kill> 204 %ECX<def> = MOV32rr %ECX<kill> 212 %EAX<def> = MOV32rr %EAX<kill> 220 %EAX<def> = MOV32rr %EAX 228 %reg1039<def> = MOV32rr %ECX<kill> The early clobber operand ties ECX input to the ECX def. The live interval of ECX is represented as this: %reg20,inf = [46,47:1)[174,230:0) 0@174-(230) 1@46-(47) The right way to represent this is something like %reg20,inf = [46,47:2)[174,182:1)[181:230:0) 0@174-(182) 1@181-230 @2@46-(47) Of course that won't work since that means overlapping live ranges defined by two val#. The workaround for now is to add a bit to val# which says the val# is redefined by a early clobber def somewhere. This prevents the move at 228 from being optimized away by SimpleRegisterCoalescing::AdjustCopiesBackFrom. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61259 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -38,16 +38,19 @@ namespace llvm {
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/// - or reg # of the definition if it's a stack slot liveinterval.
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/// copy - Copy iff val# is defined by a copy; zero otherwise.
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/// hasPHIKill - One or more of the kills are PHI nodes.
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/// redefByEC - Re-defined by early clobber somewhere during the live range.
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/// kills - Instruction # of the kills.
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struct VNInfo {
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unsigned id;
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unsigned def;
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MachineInstr *copy;
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bool hasPHIKill;
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bool hasPHIKill : 1;
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bool redefByEC : 1;
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SmallVector<unsigned, 4> kills;
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VNInfo() : id(~1U), def(~1U), copy(0), hasPHIKill(false) {}
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VNInfo()
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: id(~1U), def(~1U), copy(0), hasPHIKill(false), redefByEC(false) {}
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VNInfo(unsigned i, unsigned d, MachineInstr *c)
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: id(i), def(d), copy(c), hasPHIKill(false) {}
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: id(i), def(d), copy(c), hasPHIKill(false), redefByEC(false) {}
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};
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/// LiveRange structure - This represents a simple register range in the
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@ -177,6 +180,7 @@ namespace llvm {
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DstValNo->def = SrcValNo->def;
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DstValNo->copy = SrcValNo->copy;
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DstValNo->hasPHIKill = SrcValNo->hasPHIKill;
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DstValNo->redefByEC = SrcValNo->redefByEC;
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DstValNo->kills = SrcValNo->kills;
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}
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@ -360,6 +360,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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mi->getOpcode() == TargetInstrInfo::INSERT_SUBREG ||
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tii_->isMoveInstr(*mi, SrcReg, DstReg))
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CopyMI = mi;
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// Earlyclobbers move back one.
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ValNo = interval.getNextValue(defIndex, CopyMI, VNInfoAllocator);
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assert(ValNo->id == 0 && "First value in interval is not 0?");
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@ -435,9 +436,8 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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assert(interval.containsOneValue());
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unsigned DefIndex = getDefIndex(interval.getValNumInfo(0)->def);
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unsigned RedefIndex = getDefIndex(MIIdx);
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// Earlyclobbers move back one.
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if (MO.isEarlyClobber())
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RedefIndex = getUseIndex(MIIdx);
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// It cannot be an early clobber MO.
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assert(!MO.isEarlyClobber() && "Unexpected early clobber!");
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const LiveRange *OldLR = interval.getLiveRangeContaining(RedefIndex-1);
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VNInfo *OldValNo = OldLR->valno;
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@ -505,9 +505,8 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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// live until the end of the block. We've already taken care of the
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// rest of the live range.
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unsigned defIndex = getDefIndex(MIIdx);
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// Earlyclobbers move back one.
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if (MO.isEarlyClobber())
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defIndex = getUseIndex(MIIdx);
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// It cannot be an early clobber MO.
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assert(!MO.isEarlyClobber() && "Unexpected early clobber!");
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VNInfo *ValNo;
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MachineInstr *CopyMI = NULL;
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@ -592,8 +591,11 @@ exit:
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// Already exists? Extend old live interval.
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LiveInterval::iterator OldLR = interval.FindLiveRangeContaining(start);
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VNInfo *ValNo = (OldLR != interval.end())
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bool Extend = OldLR != interval.end();
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VNInfo *ValNo = Extend
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? OldLR->valno : interval.getNextValue(start, CopyMI, VNInfoAllocator);
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if (MO.isEarlyClobber() && Extend)
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ValNo->redefByEC = true;
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LiveRange LR(start, end, ValNo);
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interval.addRange(LR);
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interval.addKill(LR.valno, end);
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@ -119,6 +119,26 @@ bool SimpleRegisterCoalescing::AdjustCopiesBackFrom(LiveInterval &IntA,
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if (ALR == IntA.end()) // Should never happen!
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return false;
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VNInfo *AValNo = ALR->valno;
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// If it's re-defined by an early clobber somewhere in the live range, then
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// it's not safe to eliminate the copy. FIXME: This is a temporary workaround.
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// See PR3149:
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// 172 %ECX<def> = MOV32rr %reg1039<kill>
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// 180 INLINEASM <es:subl $5,$1
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// sbbl $3,$0>, 10, %EAX<def>, 14, %ECX<earlyclobber,def>, 9, %EAX<kill>,
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// 36, <fi#0>, 1, %reg0, 0, 9, %ECX<kill>, 36, <fi#1>, 1, %reg0, 0
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// 188 %EAX<def> = MOV32rr %EAX<kill>
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// 196 %ECX<def> = MOV32rr %ECX<kill>
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// 204 %ECX<def> = MOV32rr %ECX<kill>
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// 212 %EAX<def> = MOV32rr %EAX<kill>
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// 220 %EAX<def> = MOV32rr %EAX
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// 228 %reg1039<def> = MOV32rr %ECX<kill>
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// The early clobber operand ties ECX input to the ECX def.
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//
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// The live interval of ECX is represented as this:
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// %reg20,inf = [46,47:1)[174,230:0) 0@174-(230) 1@46-(47)
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// The coalescer has no idea there was a def in the middle of [174,230].
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if (AValNo->redefByEC)
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return false;
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// If AValNo is defined as a copy from IntB, we can potentially process this.
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// Get the instruction that defines this value number.
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@ -17,7 +17,7 @@ target triple = "powerpc-apple-darwin8.8.0"
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; return ((long long)Y << 32) | X;
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;}
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define i64 @test(i32 %A, i32 %B, i32 %C) {
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define i64 @test(i32 %A, i32 %B, i32 %C) nounwind {
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entry:
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%Y = alloca i32, align 4 ; <i32*> [#uses=2]
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%tmp4 = call i32 asm "subf${3:I}c $1,$4,$3\0A\09subfze $0,$2", "=r,=*&r,r,rI,r"( i32* %Y, i32 %A, i32 %B, i32 %C ) ; <i32> [#uses=1]
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32
test/CodeGen/X86/2008-12-19-EarlyClobberBug.ll
Normal file
32
test/CodeGen/X86/2008-12-19-EarlyClobberBug.ll
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@ -0,0 +1,32 @@
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; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | %prcontext End 1 | grep {movl.*%ecx}
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; PR3149
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@"\01LC" = internal constant [7 x i8] c"n0=%d\0A\00" ; <[7 x i8]*> [#uses=1]
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@llvm.used = appending global [1 x i8*] [ i8* bitcast (i32 (i64, i64)* @umoddi3 to i8*) ], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
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define i32 @umoddi3(i64 %u, i64 %v) nounwind noinline {
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entry:
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%0 = trunc i64 %v to i32 ; <i32> [#uses=2]
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%1 = trunc i64 %u to i32 ; <i32> [#uses=4]
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%2 = lshr i64 %u, 32 ; <i64> [#uses=1]
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%3 = trunc i64 %2 to i32 ; <i32> [#uses=2]
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%4 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([7 x i8]* @"\01LC", i32 0, i32 0), i32 %1) nounwind ; <i32> [#uses=0]
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%5 = icmp ult i32 %1, %0 ; <i1> [#uses=1]
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br i1 %5, label %bb2, label %bb
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bb: ; preds = %entry
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%6 = lshr i64 %v, 32 ; <i64> [#uses=1]
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%7 = trunc i64 %6 to i32 ; <i32> [#uses=1]
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%asmtmp = tail call { i32, i32 } asm "subl $5,$1\0A\09sbbl $3,$0", "=r,=&r,0,imr,1,imr,~{dirflag},~{fpsr},~{flags}"(i32 %3, i32 %7, i32 %1, i32 %0) nounwind ; <{ i32, i32 }> [#uses=2]
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%asmresult = extractvalue { i32, i32 } %asmtmp, 0 ; <i32> [#uses=1]
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%asmresult1 = extractvalue { i32, i32 } %asmtmp, 1 ; <i32> [#uses=1]
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br label %bb2
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bb2: ; preds = %bb, %entry
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%n1.0 = phi i32 [ %asmresult, %bb ], [ %3, %entry ] ; <i32> [#uses=1]
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%n0.0 = phi i32 [ %asmresult1, %bb ], [ %1, %entry ] ; <i32> [#uses=1]
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%8 = add i32 %n0.0, %n1.0 ; <i32> [#uses=1]
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ret i32 %8
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}
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declare i32 @printf(i8*, ...) nounwind
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