6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-13 09:33:50 +00:00
Code Issues Projects Releases Wiki Activity

Remove dead code. These ARM instruction definitions no longer exist.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127508 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2011-03-11 23:11:41 +00:00
parent f219f3135d
commit 5380bbf606
1 changed files with 0 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
utils/TableGen/ARMDecoderEmitter.cpp
View File

@ -1600,15 +1600,6 @@ ARMDEBackend::populateInstruction(const CodeGenInstruction &CGI,
Name == "FNEGDcc")
return false;
// Ditto for VNEGDcc and VNEGScc.
if (Name == "VNEGDcc" || Name == "VNEGScc")
return false;
// LDMIA_RET is a special case of LDM (Load Multiple) where the registers
// loaded include the PC, causing a branch to a loaded address. Ignore
// the LDMIA_RET instruction when decoding.
if (Name == "LDMIA_RET") return false;
// Bcc is in a more generic form than B. Ignore B when decoding.
if (Name == "B") return false;