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- Expand tabs to spaces.

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- select_bits.ll now fully functional now that PR1993 is closed. It was
  previously broken by refactoring in SPUInstrInfo.td and using multiclasses.
- Same for eqv.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47972 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Scott Michel
2008-03-05 23:00:19 +00:00
parent 0746d50b09
commit 53dec47f3b
24 changed files with 1096 additions and 817 deletions
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test/CodeGen/CellSPU/vecinsert.ll
+16 -16
View File
@@ -19,35 +19,35 @@ target triple = "spu-unknown-elf"
; 67 -> 0x43, as 8-bit vector constant load = 0x4343 (17219)0x4343
define <16 x i8> @test_v16i8(<16 x i8> %P, i8 %x) {
entry:
%tmp1 = insertelement <16 x i8> %P, i8 %x, i32 10
%tmp1.1 = insertelement <16 x i8> %tmp1, i8 67, i32 7
%tmp1.2 = insertelement <16 x i8> %tmp1.1, i8 %x, i32 15
ret <16 x i8> %tmp1.2
%tmp1 = insertelement <16 x i8> %P, i8 %x, i32 10
%tmp1.1 = insertelement <16 x i8> %tmp1, i8 67, i32 7
%tmp1.2 = insertelement <16 x i8> %tmp1.1, i8 %x, i32 15
ret <16 x i8> %tmp1.2
}
; 22598 -> 0x5846
define <8 x i16> @test_v8i16(<8 x i16> %P, i16 %x) {
entry:
%tmp1 = insertelement <8 x i16> %P, i16 %x, i32 5
%tmp1.1 = insertelement <8 x i16> %tmp1, i16 22598, i32 7
%tmp1.2 = insertelement <8 x i16> %tmp1.1, i16 %x, i32 2
ret <8 x i16> %tmp1.2
%tmp1 = insertelement <8 x i16> %P, i16 %x, i32 5
%tmp1.1 = insertelement <8 x i16> %tmp1, i16 22598, i32 7
%tmp1.2 = insertelement <8 x i16> %tmp1.1, i16 %x, i32 2
ret <8 x i16> %tmp1.2
}
; 1574023 -> 0x180487 (ILHU 24/IOHL 1159)
define <4 x i32> @test_v4i32_1(<4 x i32> %P, i32 %x) {
entry:
%tmp1 = insertelement <4 x i32> %P, i32 %x, i32 2
%tmp1.1 = insertelement <4 x i32> %tmp1, i32 1574023, i32 1
%tmp1.2 = insertelement <4 x i32> %tmp1.1, i32 %x, i32 3
ret <4 x i32> %tmp1.2
%tmp1 = insertelement <4 x i32> %P, i32 %x, i32 2
%tmp1.1 = insertelement <4 x i32> %tmp1, i32 1574023, i32 1
%tmp1.2 = insertelement <4 x i32> %tmp1.1, i32 %x, i32 3
ret <4 x i32> %tmp1.2
}
; Should generate IL for the load
define <4 x i32> @test_v4i32_2(<4 x i32> %P, i32 %x) {
entry:
%tmp1 = insertelement <4 x i32> %P, i32 %x, i32 2
%tmp1.1 = insertelement <4 x i32> %tmp1, i32 -39, i32 1
%tmp1.2 = insertelement <4 x i32> %tmp1.1, i32 %x, i32 3
ret <4 x i32> %tmp1.2
%tmp1 = insertelement <4 x i32> %P, i32 %x, i32 2
%tmp1.1 = insertelement <4 x i32> %tmp1, i32 -39, i32 1
%tmp1.2 = insertelement <4 x i32> %tmp1.1, i32 %x, i32 3
ret <4 x i32> %tmp1.2
}