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add patterns for FP stores
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24790 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -206,29 +206,21 @@ def STDri : F3_2<3, 0b000111,
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// Section B.5 - Store Floating-point Instructions, p. 97
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def STFrr : F3_1<3, 0b100100,
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(ops MEMrr:$addr, IntRegs:$src),
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"st $src, [$addr]", []>;
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(ops MEMrr:$addr, FPRegs:$src),
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"st $src, [$addr]",
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[(store FPRegs:$src, ADDRrr:$addr)]>;
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def STFri : F3_2<3, 0b100100,
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(ops MEMri:$addr, IntRegs:$src),
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"st $src, [$addr]", []>;
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(ops MEMri:$addr, FPRegs:$src),
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"st $src, [$addr]",
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[(store FPRegs:$src, ADDRri:$addr)]>;
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def STDFrr : F3_1<3, 0b100111,
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(ops MEMrr:$addr, IntRegs:$src),
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"std $src, [$addr]", []>;
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(ops MEMrr:$addr, DFPRegs:$src),
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"std $src, [$addr]",
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[(store DFPRegs:$src, ADDRrr:$addr)]>;
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def STDFri : F3_2<3, 0b100111,
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(ops MEMri:$addr, IntRegs:$src),
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"std $src, [$addr]", []>;
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def STFSRrr : F3_1<3, 0b100101,
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(ops MEMrr:$addr, IntRegs:$src),
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"st $src, [$addr]", []>;
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def STFSRri : F3_2<3, 0b100101,
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(ops MEMri:$addr, IntRegs:$src),
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"st $src, [$addr]", []>;
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def STDFQrr : F3_1<3, 0b100110,
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(ops MEMrr:$addr, IntRegs:$src),
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"std $src, [$addr]", []>;
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def STDFQri : F3_2<3, 0b100110,
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(ops MEMri:$addr, IntRegs:$src),
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"std $src, [$addr]", []>;
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(ops MEMri:$addr, DFPRegs:$src),
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"std $src, [$addr]",
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[(store DFPRegs:$src, ADDRri:$addr)]>;
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// Section B.9 - SETHI Instruction, p. 104
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def SETHIi: F2_1<0b100,
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@ -206,29 +206,21 @@ def STDri : F3_2<3, 0b000111,
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// Section B.5 - Store Floating-point Instructions, p. 97
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def STFrr : F3_1<3, 0b100100,
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(ops MEMrr:$addr, IntRegs:$src),
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"st $src, [$addr]", []>;
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(ops MEMrr:$addr, FPRegs:$src),
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"st $src, [$addr]",
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[(store FPRegs:$src, ADDRrr:$addr)]>;
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def STFri : F3_2<3, 0b100100,
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(ops MEMri:$addr, IntRegs:$src),
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"st $src, [$addr]", []>;
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(ops MEMri:$addr, FPRegs:$src),
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"st $src, [$addr]",
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[(store FPRegs:$src, ADDRri:$addr)]>;
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def STDFrr : F3_1<3, 0b100111,
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(ops MEMrr:$addr, IntRegs:$src),
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"std $src, [$addr]", []>;
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(ops MEMrr:$addr, DFPRegs:$src),
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"std $src, [$addr]",
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[(store DFPRegs:$src, ADDRrr:$addr)]>;
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def STDFri : F3_2<3, 0b100111,
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(ops MEMri:$addr, IntRegs:$src),
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"std $src, [$addr]", []>;
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def STFSRrr : F3_1<3, 0b100101,
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(ops MEMrr:$addr, IntRegs:$src),
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"st $src, [$addr]", []>;
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def STFSRri : F3_2<3, 0b100101,
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(ops MEMri:$addr, IntRegs:$src),
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"st $src, [$addr]", []>;
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def STDFQrr : F3_1<3, 0b100110,
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(ops MEMrr:$addr, IntRegs:$src),
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"std $src, [$addr]", []>;
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def STDFQri : F3_2<3, 0b100110,
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(ops MEMri:$addr, IntRegs:$src),
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"std $src, [$addr]", []>;
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(ops MEMri:$addr, DFPRegs:$src),
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"std $src, [$addr]",
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[(store DFPRegs:$src, ADDRri:$addr)]>;
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// Section B.9 - SETHI Instruction, p. 104
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def SETHIi: F2_1<0b100,
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