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remove cases handled elsewhere
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28150 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1938,30 +1938,16 @@ SDOperand DAGCombiner::visitSIGN_EXTEND_INREG(SDNode *N) {
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return DAG.getNode(ISD::SIGN_EXTEND, VT, Truncate);
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return DAG.getNode(ISD::SIGN_EXTEND, VT, Truncate);
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}
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}
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// If the input is already sign extended, just drop the extend.
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// If the input is already sign extended, just drop the extension.
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if (TLI.ComputeNumSignBits(N0) >= MVT::getSizeInBits(VT)-EVTBits+1)
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if (TLI.ComputeNumSignBits(N0) >= MVT::getSizeInBits(VT)-EVTBits+1)
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return N0;
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return N0;
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// fold (sext_in_reg (sext_in_reg x, VT2), VT1) -> (sext_in_reg x, minVT) pt1
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if (N0.getOpcode() == ISD::SIGN_EXTEND_INREG &&
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cast<VTSDNode>(N0.getOperand(1))->getVT() <= EVT) {
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return N0;
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}
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// fold (sext_in_reg (sext_in_reg x, VT2), VT1) -> (sext_in_reg x, minVT) pt2
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// fold (sext_in_reg (sext_in_reg x, VT2), VT1) -> (sext_in_reg x, minVT) pt2
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if (N0.getOpcode() == ISD::SIGN_EXTEND_INREG &&
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if (N0.getOpcode() == ISD::SIGN_EXTEND_INREG &&
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EVT < cast<VTSDNode>(N0.getOperand(1))->getVT()) {
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EVT < cast<VTSDNode>(N0.getOperand(1))->getVT()) {
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return DAG.getNode(ISD::SIGN_EXTEND_INREG, VT, N0.getOperand(0), N1);
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return DAG.getNode(ISD::SIGN_EXTEND_INREG, VT, N0.getOperand(0), N1);
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}
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}
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// fold (sext_in_reg (sextload x)) -> (sextload x)
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if (N0.getOpcode() == ISD::SEXTLOAD &&
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cast<VTSDNode>(N0.getOperand(3))->getVT() <= EVT) {
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return N0;
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}
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// fold (sext_in_reg (setcc x)) -> setcc x iff (setcc x) == 0 or -1
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if (N0.getOpcode() == ISD::SETCC &&
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TLI.getSetCCResultContents() ==
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TargetLowering::ZeroOrNegativeOneSetCCResult)
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return N0;
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// fold (sext_in_reg x) -> (zext_in_reg x) if the sign bit is zero
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// fold (sext_in_reg x) -> (zext_in_reg x) if the sign bit is zero
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if (TLI.MaskedValueIsZero(N0, 1ULL << (EVTBits-1)))
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if (TLI.MaskedValueIsZero(N0, 1ULL << (EVTBits-1)))
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return DAG.getZeroExtendInReg(N0, EVT);
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return DAG.getZeroExtendInReg(N0, EVT);
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