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Like the comment says, prefer to use the implicit add done by [r+r] addressing
modes than emitting an explicit add and using a base of r0. This implements Regression/CodeGen/PowerPC/mem-rr-addr-mode.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27068 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -616,11 +616,21 @@ bool PPCDAGToDAGISel::SelectAddrIdxOnly(SDOperand N, SDOperand &Base,
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// Check to see if we can easily represent this as an [r+r] address. This
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// will fail if it thinks that the address is more profitably represented as
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// reg+imm, e.g. where imm = 0.
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if (!SelectAddrIdx(N, Base, Index)) {
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// Nope, do it the hard way.
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Base = CurDAG->getRegister(PPC::R0, MVT::i32);
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Index = N;
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if (SelectAddrIdx(N, Base, Index))
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return true;
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// If the operand is an addition, always emit this as [r+r], since this is
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// better (for code size, and execution, as the memop does the add for free)
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// than emitting an explicit add.
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if (N.getOpcode() == ISD::ADD) {
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Base = N.getOperand(0);
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Index = N.getOperand(1);
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return true;
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}
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// Otherwise, do it the hard way, using R0 as the base register.
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Base = CurDAG->getRegister(PPC::R0, MVT::i32);
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Index = N;
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return true;
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}
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