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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194684 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matt Arsenault 2013-11-14 08:06:38 +00:00
parent a837ac357c
commit 54f009f5a4

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@ -440,7 +440,9 @@ void SIInstrInfo::legalizeOperands(MachineInstr *MI) const {
// Legalize VOP2
if (isVOP2(MI->getOpcode()) && Src1Idx != -1) {
MachineOperand &Src1 = MI->getOperand(Src1Idx);
// Legalize VOP2 instructions where src1 is not a VGPR.
// Legalize VOP2 instructions where src1 is not a VGPR. An SGPR input must
// be the first operand, and there can only be one.
if (Src1.isImm() || Src1.isFPImm() ||
(Src1.isReg() && RI.isSGPRClass(MRI.getRegClass(Src1.getReg())))) {
if (MI->isCommutable()) {