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Do not use MEMBARRIER_MCR for any Thumb code.

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It is only supported for ARM code.  Normally Thumb2 code would use DMB instead,
but depending on how the compiler is invoked (e.g., -mattr=-db) that might be
disabled.  This prevents a "cannot select MEMBARRIER_MCR" error in that
situation.  Radar 8644195

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118642 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bob Wilson 2010-11-09 22:50:44 +00:00
parent 7729e06c12
commit 54f9256380
2 changed files with 3 additions and 2 deletions
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4
lib/Target/ARM/ARMISelLowering.cpp
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@ -553,7 +553,7 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM)
// ARMv6 Thumb1 (except for CPUs that support dmb / dsb) and earlier use // ARMv6 Thumb1 (except for CPUs that support dmb / dsb) and earlier use
// the default expansion. // the default expansion.
if (Subtarget->hasDataBarrier() || if (Subtarget->hasDataBarrier() ||
(Subtarget->hasV6Ops() && !Subtarget->isThumb1Only())) { (Subtarget->hasV6Ops() && !Subtarget->isThumb())) {
// membarrier needs custom lowering; the rest are legal and handled // membarrier needs custom lowering; the rest are legal and handled
// normally. // normally.
setOperationAction(ISD::MEMBARRIER, MVT::Other, Custom); setOperationAction(ISD::MEMBARRIER, MVT::Other, Custom);
@ -2040,7 +2040,7 @@ static SDValue LowerMEMBARRIER(SDValue Op, SelectionDAG &DAG,
// Some ARMv6 cpus can support data barriers with an mcr instruction. // Some ARMv6 cpus can support data barriers with an mcr instruction.
// Thumb1 and pre-v6 ARM mode use a libcall instead and should never get // Thumb1 and pre-v6 ARM mode use a libcall instead and should never get
// here. // here.
assert(Subtarget->hasV6Ops() && !Subtarget->isThumb1Only() && assert(Subtarget->hasV6Ops() && !Subtarget->isThumb() &&
"Unexpected ISD::MEMBARRIER encountered. Should be libcall!"); "Unexpected ISD::MEMBARRIER encountered. Should be libcall!");
return DAG.getNode(ARMISD::MEMBARRIER_MCR, dl, MVT::Other, Op.getOperand(0), return DAG.getNode(ARMISD::MEMBARRIER_MCR, dl, MVT::Other, Op.getOperand(0),
DAG.getConstant(0, MVT::i32)); DAG.getConstant(0, MVT::i32));

1
test/CodeGen/Thumb/barrier.ll
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@ -1,4 +1,5 @@
; RUN: llc < %s -mtriple=thumbv6-apple-darwin | FileCheck %s -check-prefix=V6 ; RUN: llc < %s -mtriple=thumbv6-apple-darwin | FileCheck %s -check-prefix=V6
; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=-db | FileCheck %s -check-prefix=V6
; RUN: llc < %s -march=thumb -mattr=+v6m | FileCheck %s -check-prefix=V6M ; RUN: llc < %s -march=thumb -mattr=+v6m | FileCheck %s -check-prefix=V6M
declare void @llvm.memory.barrier(i1 , i1 , i1 , i1 , i1) declare void @llvm.memory.barrier(i1 , i1 , i1 , i1 , i1)