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Bad bad bug. x86 force indirect tail call address into eax when it's meant to force it into a call preserved register instead. Change it to ecx for now.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98270 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2010-03-11 18:49:14 +00:00
parent c6bc9a69d4
commit 55282267e1
2 changed files with 3 additions and 3 deletions
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4
lib/Target/X86/X86ISelLowering.cpp
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@ -2091,7 +2091,7 @@ X86TargetLowering::LowerCall(SDValue Chain, SDValue Callee,
// tailcall must happen after callee-saved registers are poped.
// FIXME: Give it a special register class that contains caller-saved
// register instead?
unsigned TCReg = Is64Bit ? X86::R11 : X86::EAX;
unsigned TCReg = Is64Bit ? X86::R11 : X86::ECX;
Chain = DAG.getCopyToReg(Chain, dl,
DAG.getRegister(TCReg, getPointerTy()),
Callee,InFlag);
@ -2145,7 +2145,7 @@ X86TargetLowering::LowerCall(SDValue Chain, SDValue Callee,
}
assert(((Callee.getOpcode() == ISD::Register &&
(cast<RegisterSDNode>(Callee)->getReg() == X86::EAX ||
(cast<RegisterSDNode>(Callee)->getReg() == X86::ECX ||
cast<RegisterSDNode>(Callee)->getReg() == X86::R11)) ||
Callee.getOpcode() == ISD::TargetExternalSymbol ||
Callee.getOpcode() == ISD::TargetGlobalAddress) &&

2
test/CodeGen/X86/tailcallfp2.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=x86 -tailcallopt | grep {jmp} | grep {\\*%eax}
; RUN: llc < %s -march=x86 -tailcallopt | grep {jmp} | grep {\\*%ecx}
declare i32 @putchar(i32)