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Only lower SELECT when using DAG based isel.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24755 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2005-12-17 01:22:13 +00:00
parent 7df96d6672
commit 56323c761a
2 changed files with 8 additions and 4 deletions
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1
lib/Target/X86/X86.h
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@ -31,6 +31,7 @@ enum X86VectorEnum {
extern X86VectorEnum X86Vector;
extern bool X86ScalarSSE;
extern bool X86DAGIsel;
/// createX86ISelPattern - This pass converts an LLVM function into a
/// machine code representation using pattern matching and a machine

11
lib/Target/X86/X86TargetMachine.cpp
View File

@ -27,6 +27,7 @@ using namespace llvm;
X86VectorEnum llvm::X86Vector = NoSSE;
bool llvm::X86ScalarSSE = false;
bool llvm::X86DAGIsel = false;
/// X86TargetMachineModule - Note that this is used on hosts that cannot link
/// in a library unless there are references into the library. In particular,
@ -44,8 +45,10 @@ namespace {
cl::location(X86ScalarSSE),
cl::init(false));
cl::opt<bool> EnableX86DAGDAG("enable-x86-dag-isel", cl::Hidden,
cl::desc("Enable DAG-to-DAG isel for X86"));
cl::opt<bool, true> EnableX86DAGDAG("enable-x86-dag-isel", cl::Hidden,
cl::desc("Enable DAG-to-DAG isel for X86"),
cl::location(X86DAGIsel),
cl::init(false));
// FIXME: This should eventually be handled with target triples and
// subtarget support!
@ -124,7 +127,7 @@ bool X86TargetMachine::addPassesToEmitFile(PassManager &PM, std::ostream &Out,
PM.add(createUnreachableBlockEliminationPass());
// Install an instruction selector.
if (EnableX86DAGDAG)
if (X86DAGIsel)
PM.add(createX86ISelDag(*this));
else
PM.add(createX86ISelPattern(*this));
@ -191,7 +194,7 @@ void X86JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
PM.add(createUnreachableBlockEliminationPass());
// Install an instruction selector.
if (EnableX86DAGDAG)
if (X86DAGIsel)
PM.add(createX86ISelDag(TM));
else
PM.add(createX86ISelPattern(TM));