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Only lower SELECT when using DAG based isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24755 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -31,6 +31,7 @@ enum X86VectorEnum {
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extern X86VectorEnum X86Vector;
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extern bool X86ScalarSSE;
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extern bool X86DAGIsel;
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/// createX86ISelPattern - This pass converts an LLVM function into a
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/// machine code representation using pattern matching and a machine
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@ -27,6 +27,7 @@ using namespace llvm;
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X86VectorEnum llvm::X86Vector = NoSSE;
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bool llvm::X86ScalarSSE = false;
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bool llvm::X86DAGIsel = false;
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/// X86TargetMachineModule - Note that this is used on hosts that cannot link
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/// in a library unless there are references into the library. In particular,
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@ -44,8 +45,10 @@ namespace {
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cl::location(X86ScalarSSE),
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cl::init(false));
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cl::opt<bool> EnableX86DAGDAG("enable-x86-dag-isel", cl::Hidden,
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cl::desc("Enable DAG-to-DAG isel for X86"));
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cl::opt<bool, true> EnableX86DAGDAG("enable-x86-dag-isel", cl::Hidden,
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cl::desc("Enable DAG-to-DAG isel for X86"),
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cl::location(X86DAGIsel),
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cl::init(false));
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// FIXME: This should eventually be handled with target triples and
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// subtarget support!
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@ -124,7 +127,7 @@ bool X86TargetMachine::addPassesToEmitFile(PassManager &PM, std::ostream &Out,
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PM.add(createUnreachableBlockEliminationPass());
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// Install an instruction selector.
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if (EnableX86DAGDAG)
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if (X86DAGIsel)
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PM.add(createX86ISelDag(*this));
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else
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PM.add(createX86ISelPattern(*this));
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@ -191,7 +194,7 @@ void X86JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
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PM.add(createUnreachableBlockEliminationPass());
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// Install an instruction selector.
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if (EnableX86DAGDAG)
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if (X86DAGIsel)
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PM.add(createX86ISelDag(TM));
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else
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PM.add(createX86ISelPattern(TM));
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