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Mark DIV/IDIV instructions hasSideEffects=1 because they can trap when dividing by 0. This is needed to keep early if conversion from moving them across basic blocks.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171461 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2013-01-03 06:40:20 +00:00
parent be76df6ce6
commit 56bc0ab095
2 changed files with 33 additions and 1 deletions
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2
lib/Target/X86/X86InstrArithmetic.td
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@ -266,7 +266,7 @@ def IMUL64rmi8 : RIi8<0x6B, MRMSrcMem, // GR64 = [mem64]*I8
// unsigned division/remainder
let hasSideEffects = 0 in {
let hasSideEffects = 1 in { // so that we don't speculatively execute
let Defs = [AL,EFLAGS,AX], Uses = [AX] in
def DIV8r : I<0xF6, MRM6r, (outs), (ins GR8:$src), // AX/r8 = AL,AH
"div{b}\t$src", [], IIC_DIV8_REG>;

32
test/CodeGen/X86/early-ifcvt.ll
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@ -142,3 +142,35 @@ save_state_and_return:
}
declare void @BZ2_bz__AssertH__fail()
; Make sure we don't speculate on div/idiv instructions
; CHECK: test_idiv
; CHECK-NOT: cmov
define i32 @test_idiv(i32 %a, i32 %b) nounwind uwtable readnone ssp {
%1 = icmp eq i32 %b, 0
br i1 %1, label %4, label %2
; <label>:2 ; preds = %0
%3 = sdiv i32 %a, %b
br label %4
; <label>:4 ; preds = %0, %2
%5 = phi i32 [ %3, %2 ], [ %a, %0 ]
ret i32 %5
}
; CHECK: test_div
; CHECK-NOT: cmov
define i32 @test_div(i32 %a, i32 %b) nounwind uwtable readnone ssp {
%1 = icmp eq i32 %b, 0
br i1 %1, label %4, label %2
; <label>:2 ; preds = %0
%3 = udiv i32 %a, %b
br label %4
; <label>:4 ; preds = %0, %2
%5 = phi i32 [ %3, %2 ], [ %a, %0 ]
ret i32 %5
}