add some special case handling for strangely named x86 registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81726 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2009-09-13 22:41:48 +00:00
parent 7f068f47a3
commit 56d77c7022

View File

@ -9324,15 +9324,39 @@ X86TargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
// Not found as a standard register?
if (Res.second == 0) {
// GCC calls "st(0)" just plain "st".
// Map st(0) -> st(7) -> ST0
if (Constraint.size() == 7 && Constraint[0] == '{' &&
tolower(Constraint[1]) == 's' &&
tolower(Constraint[2]) == 't' &&
Constraint[3] == '(' &&
(Constraint[4] >= '0' && Constraint[4] <= '7') &&
Constraint[5] == ')' &&
Constraint[6] == '}') {
Res.first = X86::ST0+Constraint[4]-'0';
Res.second = X86::RFP80RegisterClass;
return Res;
}
// GCC allows "st(0)" to be called just plain "st".
if (StringsEqualNoCase("{st}", Constraint)) {
Res.first = X86::ST0;
Res.second = X86::RFP80RegisterClass;
return Res;
}
// flags -> EFLAGS
if (StringsEqualNoCase("{flags}", Constraint)) {
Res.first = X86::EFLAGS;
Res.second = X86::CCRRegisterClass;
return Res;
}
// 'A' means EAX + EDX.
if (Constraint == "A") {
Res.first = X86::EAX;
Res.second = X86::GR32_ADRegisterClass;
return Res;
}
return Res;
}