From 56e3232d5a5206f8b554eccd4aea2e75e59d4314 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Wed, 3 Aug 2011 16:33:19 +0000 Subject: [PATCH] Handle IMPLICIT_DEF instructions in X86FloatingPoint. This fixes PR10575. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136787 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86FloatingPoint.cpp | 13 +++++++++++++ test/CodeGen/X86/fp-stack-O0-crash.ll | 21 ++++++++++++++++++++- 2 files changed, 33 insertions(+), 1 deletion(-) diff --git a/lib/Target/X86/X86FloatingPoint.cpp b/lib/Target/X86/X86FloatingPoint.cpp index 6eed6abd43e..6f619a9e567 100644 --- a/lib/Target/X86/X86FloatingPoint.cpp +++ b/lib/Target/X86/X86FloatingPoint.cpp @@ -406,6 +406,10 @@ bool FPS::processBasicBlock(MachineFunction &MF, MachineBasicBlock &BB) { if (MI->isCopy() && isFPCopy(MI)) FPInstClass = X86II::SpecialFP; + if (MI->isImplicitDef() && + X86::RFP80RegClass.contains(MI->getOperand(0).getReg())) + FPInstClass = X86II::SpecialFP; + if (FPInstClass == X86II::NotFP) continue; // Efficiently ignore non-fp insts! @@ -1369,6 +1373,15 @@ void FPS::handleSpecialFP(MachineBasicBlock::iterator &I) { break; } + case TargetOpcode::IMPLICIT_DEF: { + // All FP registers must be explicitly defined, so load a 0 instead. + unsigned Reg = MI->getOperand(0).getReg() - X86::FP0; + DEBUG(dbgs() << "Emitting LD_F0 for implicit FP" << Reg << '\n'); + BuildMI(*MBB, I, MI->getDebugLoc(), TII->get(X86::LD_F0)); + pushReg(Reg); + break; + } + case X86::FpPOP_RETVAL: { // The FpPOP_RETVAL instruction is used after calls that return a value on // the floating point stack. We cannot model this with ST defs since CALL diff --git a/test/CodeGen/X86/fp-stack-O0-crash.ll b/test/CodeGen/X86/fp-stack-O0-crash.ll index 9b629c08652..ae83a02c674 100644 --- a/test/CodeGen/X86/fp-stack-O0-crash.ll +++ b/test/CodeGen/X86/fp-stack-O0-crash.ll @@ -1,4 +1,4 @@ -; RUN: llc %s -O0 -fast-isel -regalloc=fast -o - +; RUN: llc %s -O0 -fast-isel -regalloc=fast -mcpu=i386 -o - ; PR4767 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" @@ -28,3 +28,22 @@ if.then: ; preds = %cond.false, %cond.t if.end: ; preds = %if.then, %cond.false, %cond.true ret void } + +; PR10575 +; This produces a FP0 = IMPLICIT_DEF instruction. +define void @__m_rankmerge_MOD_dindexmerge_() nounwind { +entry: + br label %"20" + +"20": ; preds = %"23", %entry + %0 = phi double [ undef, %entry ], [ %0, %"23" ] + %1 = phi double [ 0.000000e+00, %entry ], [ %2, %"23" ] + br i1 undef, label %"21", label %"23" + +"21": ; preds = %"20" + ret void + +"23": ; preds = %"20" + %2 = select i1 undef, double %0, double %1 + br label %"20" +}