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Merge r127263 from mainline, fixes PR9427 for 2.9.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_29@127437 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1785,7 +1785,7 @@ int RegReductionPQBase::RegPressureDiff(SUnit *SU, unsigned &LiveUses) const {
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}
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const SDNode *N = SU->getNode();
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if (!N->isMachineOpcode() || !SU->NumSuccs)
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if (!N || !N->isMachineOpcode() || !SU->NumSuccs)
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return PDiff;
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unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs();
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@ -1804,6 +1804,9 @@ void RegReductionPQBase::ScheduledNode(SUnit *SU) {
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if (!TracksRegPressure)
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return;
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if (!SU->getNode())
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return;
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for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end();
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I != E; ++I) {
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if (I->isCtrl())
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@ -1870,6 +1873,8 @@ void RegReductionPQBase::UnscheduledNode(SUnit *SU) {
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return;
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const SDNode *N = SU->getNode();
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if (!N) return;
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if (!N->isMachineOpcode()) {
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if (N->getOpcode() != ISD::CopyToReg)
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return;
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@ -446,6 +446,10 @@ void ScheduleDAGSDNodes::BuildSchedGraph(AliasAnalysis *AA) {
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// Initialize NumNodeDefs for the current Node's opcode.
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void ScheduleDAGSDNodes::RegDefIter::InitNodeNumDefs() {
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// Check for phys reg copy.
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if (!Node)
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return;
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if (!Node->isMachineOpcode()) {
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if (Node->getOpcode() == ISD::CopyFromReg)
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NodeNumDefs = 1;
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