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Add an TargetInstrDesc bit to indicate that a given instruction is a conditional move.

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Not intended functionality change, as nothing uses this yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114702 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Owen Anderson 2010-09-23 22:44:10 +00:00
parent 823d9a53a4
commit 5716180b1a
5 changed files with 11 additions and 0 deletions
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1
include/llvm/Target/Target.td
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@ -201,6 +201,7 @@ class Instruction {
bit isCompare = 0; // Is this instruction a comparison instruction?
bit isBarrier = 0; // Can control flow fall through this instruction?
bit isCall = 0; // Is this instruction a call instruction?
bit isConditionalMove = 0; // Is this instruction a conditional move instr?
bit canFoldAsLoad = 0; // Can this be folded as a simple memory operand?
bit mayLoad = 0; // Is it possible for this inst to read memory?
bit mayStore = 0; // Is it possible for this inst to write memory?

7
include/llvm/Target/TargetInstrDesc.h
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@ -99,6 +99,7 @@ namespace TID {
HasOptionalDef,
Return,
Call,
ConditionalMove,
Barrier,
Terminator,
Branch,
@ -352,6 +353,12 @@ public:
return Flags & (1 << TID::Compare);
}
/// isConditionalMove - Return true if this instruction can be considered a
/// conditional move, like CMOV on X86 or MOVCC on ARM.
bool isConditionalMove() const {
return Flags & (1 << TID::ConditionalMove);
}
/// isNotDuplicable - Return true if this instruction cannot be safely
/// duplicated. For example, if the instruction has a unique labels attached
/// to it, duplicating it would cause multiple definition errors.

1
utils/TableGen/CodeGenInstruction.cpp
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@ -103,6 +103,7 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
isBranch = R->getValueAsBit("isBranch");
isIndirectBranch = R->getValueAsBit("isIndirectBranch");
isCompare = R->getValueAsBit("isCompare");
isConditionalMove = R->getValueAsBit("isConditionalMove");
isBarrier = R->getValueAsBit("isBarrier");
isCall = R->getValueAsBit("isCall");
canFoldAsLoad = R->getValueAsBit("canFoldAsLoad");

1
utils/TableGen/CodeGenInstruction.h
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@ -124,6 +124,7 @@ namespace llvm {
bool isBranch;
bool isIndirectBranch;
bool isCompare;
bool isConditionalMove;
bool isBarrier;
bool isCall;
bool canFoldAsLoad;

1
utils/TableGen/InstrInfoEmitter.cpp
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@ -274,6 +274,7 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num,
if (Inst.isBarrier) OS << "|(1<<TID::Barrier)";
if (Inst.hasDelaySlot) OS << "|(1<<TID::DelaySlot)";
if (Inst.isCall) OS << "|(1<<TID::Call)";
if (Inst.isConditionalMove) OS << "|(1<<TID::ConditionalMove)";
if (Inst.canFoldAsLoad) OS << "|(1<<TID::FoldableAsLoad)";
if (Inst.mayLoad) OS << "|(1<<TID::MayLoad)";
if (Inst.mayStore) OS << "|(1<<TID::MayStore)";