From 57c3dac0df7ac1b53ae7c0e5d2adc459fc7bd37c Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Tue, 30 Sep 2008 00:58:23 +0000 Subject: [PATCH] Move the GlobalBaseReg field out of X86ISelDAGToDAG.cpp and X86FastISel.cpp into X86MachineFunction.h, so that it can be shared, instead of having each selector keep track of its own. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56825 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86FastISel.cpp | 21 ++------------------- lib/Target/X86/X86ISelDAGToDAG.cpp | 15 ++------------- lib/Target/X86/X86InstrInfo.cpp | 23 +++++++++++++++++------ lib/Target/X86/X86InstrInfo.h | 7 ++++--- lib/Target/X86/X86MachineFunctionInfo.h | 13 +++++++++++-- 5 files changed, 36 insertions(+), 43 deletions(-) diff --git a/lib/Target/X86/X86FastISel.cpp b/lib/Target/X86/X86FastISel.cpp index 866d12fa594..96539b11fd8 100644 --- a/lib/Target/X86/X86FastISel.cpp +++ b/lib/Target/X86/X86FastISel.cpp @@ -40,10 +40,6 @@ class X86FastISel : public FastISel { /// unsigned StackPtr; - /// GlobalBaseReg - keeps track of the virtual register mapped onto global - /// base register. - unsigned GlobalBaseReg; - /// X86ScalarSSEf32, X86ScalarSSEf64 - Select between SSE or x87 /// floating point ops. /// When SSE is available, use it for f32 operations. @@ -60,7 +56,6 @@ public: : FastISel(mf, mmi, vm, bm, am) { Subtarget = &TM.getSubtarget(); StackPtr = Subtarget->is64Bit() ? X86::RSP : X86::ESP; - GlobalBaseReg = 0; X86ScalarSSEf64 = Subtarget->hasSSE2(); X86ScalarSSEf32 = Subtarget->hasSSE1(); } @@ -103,8 +98,6 @@ private: CCAssignFn *CCAssignFnForCall(unsigned CC, bool isTailCall = false); - unsigned getGlobalBaseReg(); - const X86InstrInfo *getInstrInfo() const { return getTargetMachine()->getInstrInfo(); } @@ -152,16 +145,6 @@ bool X86FastISel::isTypeLegal(const Type *Ty, const TargetLowering &TLI, return (AllowI1 && VT == MVT::i1) || TLI.isTypeLegal(VT); } -/// getGlobalBaseReg - Return the the global base register. Output -/// instructions required to initialize the global base register, if necessary. -/// -unsigned X86FastISel::getGlobalBaseReg() { - assert(!Subtarget->is64Bit() && "X86-64 PIC uses RIP relative addressing"); - if (!GlobalBaseReg) - GlobalBaseReg = getInstrInfo()->initializeGlobalBaseReg(MBB->getParent()); - return GlobalBaseReg; -} - #include "X86GenCallingConv.inc" /// CCAssignFnForCall - Selects the correct CCAssignFn for a given calling @@ -433,7 +416,7 @@ bool X86FastISel::X86SelectAddress(Value *V, X86AddressMode &AM, bool isCall) { if (!isCall && TM.getRelocationModel() == Reloc::PIC_ && !Subtarget->is64Bit()) - AM.Base.Reg = getGlobalBaseReg(); + AM.Base.Reg = getInstrInfo()->getGlobalBaseReg(&MF); // Emit an extra load if the ABI requires it. if (Subtarget->GVRequiresExtraLoad(GV, TM, isCall)) { @@ -1042,7 +1025,7 @@ bool X86FastISel::X86SelectCall(Instruction *I) { TM.getRelocationModel() == Reloc::PIC_ && Subtarget->isPICStyleGOT()) { TargetRegisterClass *RC = X86::GR32RegisterClass; - unsigned Base = getGlobalBaseReg(); + unsigned Base = getInstrInfo()->getGlobalBaseReg(&MF); bool Emitted = TII.copyRegToReg(*MBB, MBB->end(), X86::EBX, Base, RC, RC); assert(Emitted && "Failed to emit a copy instruction!"); } diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp index 6cc044c7e85..692f4deb7d8 100644 --- a/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -123,10 +123,6 @@ namespace { /// make the right decision when generating code for different targets. const X86Subtarget *Subtarget; - /// GlobalBaseReg - keeps track of the virtual register mapped onto global - /// base register. - unsigned GlobalBaseReg; - /// CurBB - Current BB being isel'd. /// MachineBasicBlock *CurBB; @@ -143,12 +139,6 @@ namespace { Subtarget(&TM.getSubtarget()), OptForSize(OptimizeForSize) {} - virtual bool runOnFunction(Function &Fn) { - // Make sure we re-emit a set of the global base reg if necessary - GlobalBaseReg = 0; - return SelectionDAGISel::runOnFunction(Fn); - } - virtual const char *getPassName() const { return "X86 DAG->DAG Instruction Selection"; } @@ -1174,9 +1164,8 @@ bool X86DAGToDAGISel::TryFoldLoad(SDValue P, SDValue N, /// initialize the global base register, if necessary. /// SDNode *X86DAGToDAGISel::getGlobalBaseReg() { - assert(!Subtarget->is64Bit() && "X86-64 PIC uses RIP relative addressing"); - if (!GlobalBaseReg) - GlobalBaseReg = TM.getInstrInfo()->initializeGlobalBaseReg(BB->getParent()); + MachineFunction *MF = CurBB->getParent(); + unsigned GlobalBaseReg = TM.getInstrInfo()->getGlobalBaseReg(MF); return CurDAG->getRegister(GlobalBaseReg, TLI.getPointerTy()).getNode(); } diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index c275418ddd8..cac35b1c3dd 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -2947,10 +2947,19 @@ unsigned X86InstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const { return Size; } -/// initializeGlobalBaseReg - Output the instructions required to put the -/// base address to use for accessing globals into a register. +/// getGlobalBaseReg - Return a virtual register initialized with the +/// the global base register value. Output instructions required to +/// initialize the register in the function entry block, if necessary. /// -unsigned X86InstrInfo::initializeGlobalBaseReg(MachineFunction *MF) const { +unsigned X86InstrInfo::getGlobalBaseReg(MachineFunction *MF) const { + assert(!TM.getSubtarget().is64Bit() && + "X86-64 PIC uses RIP relative addressing"); + + X86MachineFunctionInfo *X86FI = MF->getInfo(); + unsigned GlobalBaseReg = X86FI->getGlobalBaseReg(); + if (GlobalBaseReg != 0) + return GlobalBaseReg; + // Insert the set of GlobalBaseReg into the first MBB of the function MachineBasicBlock &FirstMBB = MF->front(); MachineBasicBlock::iterator MBBI = FirstMBB.begin(); @@ -2966,12 +2975,14 @@ unsigned X86InstrInfo::initializeGlobalBaseReg(MachineFunction *MF) const { // not to pc, but to _GLOBAL_ADDRESS_TABLE_ external if (TM.getRelocationModel() == Reloc::PIC_ && TM.getSubtarget().isPICStyleGOT()) { - unsigned GlobalBaseReg = + GlobalBaseReg = RegInfo.createVirtualRegister(X86::GR32RegisterClass); BuildMI(FirstMBB, MBBI, TII->get(X86::ADD32ri), GlobalBaseReg) .addReg(PC).addExternalSymbol("_GLOBAL_OFFSET_TABLE_"); - return GlobalBaseReg; + } else { + GlobalBaseReg = PC; } - return PC; + X86FI->setGlobalBaseReg(GlobalBaseReg); + return GlobalBaseReg; } diff --git a/lib/Target/X86/X86InstrInfo.h b/lib/Target/X86/X86InstrInfo.h index 62bec6f614b..20f00102631 100644 --- a/lib/Target/X86/X86InstrInfo.h +++ b/lib/Target/X86/X86InstrInfo.h @@ -414,10 +414,11 @@ public: /// virtual unsigned GetInstSizeInBytes(const MachineInstr *MI) const; - /// initializeGlobalBaseReg - Output the instructions required to put the - /// base address to use for accessing globals into a register. + /// getGlobalBaseReg - Return a virtual register initialized with the + /// the global base register value. Output instructions required to + /// initialize the register in the function entry block, if necessary. /// - unsigned initializeGlobalBaseReg(MachineFunction *MF) const; + unsigned getGlobalBaseReg(MachineFunction *MF) const; private: MachineInstr* foldMemoryOperand(MachineFunction &MF, diff --git a/lib/Target/X86/X86MachineFunctionInfo.h b/lib/Target/X86/X86MachineFunctionInfo.h index b5c9cafeca8..edce2a9783e 100644 --- a/lib/Target/X86/X86MachineFunctionInfo.h +++ b/lib/Target/X86/X86MachineFunctionInfo.h @@ -58,6 +58,10 @@ class X86MachineFunctionInfo : public MachineFunctionInfo { /// holds the virtual register into which the sret argument is passed. unsigned SRetReturnReg; + /// GlobalBaseReg - keeps track of the virtual register mapped onto global + /// base register. + unsigned GlobalBaseReg; + public: X86MachineFunctionInfo() : ForceFramePointer(false), CalleeSavedFrameSize(0), @@ -65,7 +69,8 @@ public: DecorationStyle(None), ReturnAddrIndex(0), TailCallReturnAddrDelta(0), - SRetReturnReg(0) {} + SRetReturnReg(0), + GlobalBaseReg(0) {} X86MachineFunctionInfo(MachineFunction &MF) : ForceFramePointer(false), CalleeSavedFrameSize(0), @@ -73,7 +78,8 @@ public: DecorationStyle(None), ReturnAddrIndex(0), TailCallReturnAddrDelta(0), - SRetReturnReg(0) {} + SRetReturnReg(0), + GlobalBaseReg(0) {} bool getForceFramePointer() const { return ForceFramePointer;} void setForceFramePointer(bool forceFP) { ForceFramePointer = forceFP; } @@ -95,6 +101,9 @@ public: unsigned getSRetReturnReg() const { return SRetReturnReg; } void setSRetReturnReg(unsigned Reg) { SRetReturnReg = Reg; } + + unsigned getGlobalBaseReg() const { return GlobalBaseReg; } + void setGlobalBaseReg(unsigned Reg) { GlobalBaseReg = Reg; } }; } // End llvm namespace