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SimplifyCFG: Use parallel-and and parallel-or mode to consolidate branch conditions
Merge consecutive if-regions if they contain identical statements. Both transformations reduce number of branches. The transformation is guarded by a target-hook, and is currently enabled only for +R600, but the correctness has been tested on X86 target using a variety of CPU benchmarks. Patch by: Mei Ye git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187278 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -39,6 +39,7 @@ class DataLayout;
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class TargetLibraryInfo;
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class TargetTransformInfo;
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class DIBuilder;
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class AliasAnalysis;
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template<typename T> class SmallVectorImpl;
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@@ -136,7 +137,7 @@ bool EliminateDuplicatePHINodes(BasicBlock *BB);
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/// the basic block that was pointed to.
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///
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bool SimplifyCFG(BasicBlock *BB, const TargetTransformInfo &TTI,
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const DataLayout *TD = 0);
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const DataLayout *TD = 0, AliasAnalysis *AA = 0);
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/// FoldBranchToCommonDest - If this basic block is ONLY a setcc and a branch,
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/// and if a predecessor branches to us and one of our successors, fold the
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