From 583a2a06152de7796967488f3689e109ba6c5364 Mon Sep 17 00:00:00 2001 From: Bob Wilson Date: Fri, 25 Jun 2010 21:17:19 +0000 Subject: [PATCH] Add support for encoding 2-register NEON instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106891 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMCodeEmitter.cpp | 28 +++++++++++++++++++++++++--- 1 file changed, 25 insertions(+), 3 deletions(-) diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp index 8281d68bce4..0269afa3d4d 100644 --- a/lib/Target/ARM/ARMCodeEmitter.cpp +++ b/lib/Target/ARM/ARMCodeEmitter.cpp @@ -139,7 +139,8 @@ namespace { void emitMiscInstruction(const MachineInstr &MI); - void emitNEON1RegModImm(const MachineInstr &MI); + void emitNEON1RegModImmInstruction(const MachineInstr &MI); + void emitNEON2RegInstruction(const MachineInstr &MI); /// getMachineOpValue - Return binary encoding of operand. If the machine /// operand requires relocation, record the relocation and return zero. @@ -412,7 +413,10 @@ void ARMCodeEmitter::emitInstruction(const MachineInstr &MI) { break; // NEON instructions. case ARMII::N1RegModImmFrm: - emitNEON1RegModImm(MI); + emitNEON1RegModImmInstruction(MI); + break; + case ARMII::N2RegFrm: + emitNEON2RegInstruction(MI); break; } MCE.processDebugLoc(MI.getDebugLoc(), false); @@ -1555,7 +1559,16 @@ static unsigned encodeNEONRd(const MachineInstr &MI, unsigned OpIdx) { return Binary; } -void ARMCodeEmitter::emitNEON1RegModImm(const MachineInstr &MI) { +static unsigned encodeNEONRm(const MachineInstr &MI, unsigned OpIdx) { + unsigned RegM = MI.getOperand(OpIdx).getReg(); + unsigned Binary = 0; + RegM = ARMRegisterInfo::getRegisterNumbering(RegM); + Binary |= (RegM & 0xf); + Binary |= ((RegM >> 4) & 1) << ARMII::M_BitShift; + return Binary; +} + +void ARMCodeEmitter::emitNEON1RegModImmInstruction(const MachineInstr &MI) { unsigned Binary = getBinaryCodeForInstr(MI); // Destination register is encoded in Dd. Binary |= encodeNEONRd(MI, 0); @@ -1574,4 +1587,13 @@ void ARMCodeEmitter::emitNEON1RegModImm(const MachineInstr &MI) { emitWordLE(Binary); } +void ARMCodeEmitter::emitNEON2RegInstruction(const MachineInstr &MI) { + unsigned Binary = getBinaryCodeForInstr(MI); + // Destination register is encoded in Dd. + Binary |= encodeNEONRd(MI, 0); + Binary |= encodeNEONRm(MI, 1); + // FIXME: This does not handle VDUPfdf or VDUPfqf. + emitWordLE(Binary); +} + #include "ARMGenCodeEmitter.inc"