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Add assembly parsing support for "msr" and also fix its encoding. Also add
testcases for the disassembler to make sure it still works for "msr". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125948 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -161,6 +161,12 @@ def ProcIFlagsOperand : AsmOperandClass {
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let ParserMethod = "tryParseProcIFlagsOperand";
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}
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def MSRMaskOperand : AsmOperandClass {
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let Name = "MSRMask";
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let SuperClasses = [];
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let ParserMethod = "tryParseMSRMaskOperand";
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}
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// ARM imod and iflag operands, used only by the CPS instruction.
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def imod_op : Operand<i32> {
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let PrintMethod = "printCPSIMod";
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@@ -205,6 +211,7 @@ def cps_opt : Operand<i32> {
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def msr_mask : Operand<i32> {
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let PrintMethod = "printMSRMaskOperand";
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let ParserMatchClass = MSRMaskOperand;
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}
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// A8.6.117, A8.6.118. Different instructions are generated for #0 and #-0.
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