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R600: Use correct LoadExtType when lowering kernel arguments
Reviewed-by: Vincent Lejeune <vljn at ovi.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186915 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1229,9 +1229,17 @@ SDValue R600TargetLowering::LowerFormalArguments(
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} else {
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ArgVT = VT;
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}
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ISD::LoadExtType LoadType = ISD::EXTLOAD;
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if (Ins[i].Flags.isZExt()) {
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LoadType = ISD::ZEXTLOAD;
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} else if (Ins[i].Flags.isSExt()) {
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LoadType = ISD::SEXTLOAD;
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}
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PointerType *PtrTy = PointerType::get(VT.getTypeForEVT(*DAG.getContext()),
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AMDGPUAS::PARAM_I_ADDRESS);
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SDValue Arg = DAG.getExtLoad(ISD::ZEXTLOAD, DL, VT, DAG.getRoot(),
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SDValue Arg = DAG.getExtLoad(LoadType, DL, VT, DAG.getRoot(),
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DAG.getConstant(ParamOffsetBytes, MVT::i32),
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MachinePointerInfo(UndefValue::get(PtrTy)),
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ArgVT, false, false, ArgBytes);
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@ -21,6 +21,15 @@ entry:
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ret void
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}
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; CHECK: @i8_sext_arg
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; CHECK: VTX_READ_8 T{{[0-9]+\.X, T[0-9]+\.X}}
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define void @i8_sext_arg(i32 addrspace(1)* nocapture %out, i8 signext %in) nounwind {
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entry:
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%0 = sext i8 %in to i32
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store i32 %0, i32 addrspace(1)* %out, align 4
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ret void
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}
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; CHECK: @i16_arg
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; CHECK: VTX_READ_16 T{{[0-9]+\.X, T[0-9]+\.X}}
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@ -40,3 +49,13 @@ entry:
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store i32 %0, i32 addrspace(1)* %out, align 4
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ret void
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}
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; CHECK: @i16_sext_arg
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; CHECK: VTX_READ_16 T{{[0-9]+\.X, T[0-9]+\.X}}
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define void @i16_sext_arg(i32 addrspace(1)* nocapture %out, i16 signext %in) nounwind {
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entry:
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%0 = sext i16 %in to i32
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store i32 %0, i32 addrspace(1)* %out, align 4
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ret void
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}
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