6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-13 20:32:21 +00:00
Code Issues Projects Releases Wiki Activity

Declare YMM subregisters in the right way! Thanks Jakob

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108022 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bruno Cardoso Lopes 2010-07-09 21:46:19 +00:00
parent d52e78efac
commit 58dbf3784d
1 changed files with 1 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
lib/Target/X86/X86RegisterInfo.td
View File

@ -181,8 +181,7 @@ let Namespace = "X86" in {
}
// YMM Registers, used by AVX instructions
// The sub_ss and sub_sd subregs are the same registers with another regclass.
let CompositeIndices = [(sub_ss), (sub_sd)], SubRegIndices = [sub_xmm] in {
let SubRegIndices = [sub_xmm] in {
def YMM0: RegisterWithSubRegs<"ymm0", [XMM0]>, DwarfRegNum<[17, 21, 21]>;
def YMM1: RegisterWithSubRegs<"ymm1", [XMM1]>, DwarfRegNum<[18, 22, 22]>;
def YMM2: RegisterWithSubRegs<"ymm2", [XMM2]>, DwarfRegNum<[19, 23, 23]>;