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Teach SelectionDAG to constant fold all-constant FMA nodes the same way that it constant folds FADD, FMUL, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181555 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -3261,6 +3261,21 @@ SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
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// Perform various simplifications.
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ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
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switch (Opcode) {
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case ISD::FMA: {
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ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
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ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2);
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ConstantFPSDNode *N3CFP = dyn_cast<ConstantFPSDNode>(N3);
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if (N1CFP && N2CFP && N3CFP) {
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APFloat V1 = N1CFP->getValueAPF();
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const APFloat &V2 = N2CFP->getValueAPF();
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const APFloat &V3 = N3CFP->getValueAPF();
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APFloat::opStatus s =
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V1.fusedMultiplyAdd(V2, V3, APFloat::rmNearestTiesToEven);
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if (s != APFloat::opInvalidOp)
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return getConstantFP(V1, VT);
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}
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break;
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}
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case ISD::CONCAT_VECTORS:
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// A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
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// one big BUILD_VECTOR.
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@ -34,6 +34,14 @@ entry:
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ret x86_fp80 %call
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}
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; CHECK: test_f32_cst
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; CHECK-NOT: fma
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define float @test_f32_cst() nounwind readnone ssp {
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entry:
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%call = tail call float @llvm.fma.f32(float 3.0, float 3.0, float 3.0) nounwind readnone
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ret float %call
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}
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declare float @llvm.fma.f32(float, float, float) nounwind readnone
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declare double @llvm.fma.f64(double, double, double) nounwind readnone
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declare x86_fp80 @llvm.fma.f80(x86_fp80, x86_fp80, x86_fp80) nounwind readnone
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