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add an assert so that PR2356 explodes instead of running off an

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array.  Improve some minor comments, refactor some helpers in
AsmOperandInfo.  No functionality change for valid code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57686 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2008-10-17 16:21:11 +00:00
parent 86af90d802
commit 58f15c482a
3 changed files with 34 additions and 6 deletions
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15
lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
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@ -4363,8 +4363,10 @@ void RegsForValue::AddInlineAsmOperands(unsigned Code, SelectionDAG &DAG,
for (unsigned Value = 0, Reg = 0, e = ValueVTs.size(); Value != e; ++Value) {
unsigned NumRegs = TLI->getNumRegisters(ValueVTs[Value]);
MVT RegisterVT = RegVTs[Value];
for (unsigned i = 0; i != NumRegs; ++i)
for (unsigned i = 0; i != NumRegs; ++i) {
assert(Reg < Regs.size() && "Mismatch in # registers expected");
Ops.push_back(DAG.getRegister(Regs[Reg++], RegisterVT));
}
}
}
@ -4557,8 +4559,9 @@ GetRegistersForValue(SDISelAsmOperandInfo &OpInfo,
const TargetRegisterClass *RC = PhysReg.second;
if (RC) {
// If this is a tied register, our regalloc doesn't know how to maintain
// the constraint. If it isn't, go ahead and create vreg
// and let the regalloc do the right thing.
// the constraint, so we have to pick a register to pin the input/output to.
// If it isn't a matched constraint, go ahead and create vreg and let the
// regalloc do its thing.
if (!OpInfo.hasMatchingInput) {
RegVT = *PhysReg.second->vt_begin();
if (OpInfo.ConstraintVT == MVT::Other)
@ -4785,7 +4788,7 @@ void SelectionDAGLowering::visitInlineAsm(CallSite CS) {
// Second pass - Loop over all of the operands, assigning virtual or physregs
// to registerclass operands.
// to register class operands.
for (unsigned i = 0, e = ConstraintOperands.size(); i != e; ++i) {
SDISelAsmOperandInfo &OpInfo = ConstraintOperands[i];
@ -4860,10 +4863,10 @@ void SelectionDAGLowering::visitInlineAsm(CallSite CS) {
case InlineAsm::isInput: {
SDValue InOperandVal = OpInfo.CallOperand;
if (isdigit(OpInfo.ConstraintCode[0])) { // Matching constraint?
if (OpInfo.isMatchingConstraint()) { // Matching constraint?
// If this is required to match an output register we have already set,
// just use its register.
unsigned OperandNo = atoi(OpInfo.ConstraintCode.c_str());
unsigned OperandNo = OpInfo.getMatchedOperand();
// Scan until we find the definition we already emitted of this operand.
// When we find it, create a RegsForValue operand.