mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-09-28 06:58:19 +00:00
Reworked branching so we don't handle BAs specially. It just updates the branchTO regardless of what type of branch it is.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18322 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tanya Lattner
parent
3c54b6cc73
commit
58fe2f0734
@ -752,7 +752,7 @@ void ModuloSchedulingPass::computePartialOrder() {
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//Only push BA branches onto the final node order, we put other branches after it
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//FIXME: Should we really be pushing branches on it a specific order instead of relying
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//on BA being there?
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std::vector<MSchedGraphNode*> otherBranch;
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std::vector<MSchedGraphNode*> branches;
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//Loop over all recurrences and add to our partial order
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//be sure to remove nodes that are already in the partial order in
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@ -777,10 +777,7 @@ void ModuloSchedulingPass::computePartialOrder() {
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}
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if(!found) {
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if((*N)->isBranch()) {
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if((*N)->getInst()->getOpcode() == V9::BA)
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FinalNodeOrder.push_back(*N);
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else
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otherBranch.push_back(*N);
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branches.push_back(*N);
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}
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else
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new_recurrence.insert(*N);
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@ -804,10 +801,7 @@ void ModuloSchedulingPass::computePartialOrder() {
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if(!predFound)
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if(!new_recurrence.count(*P)) {
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if((*P)->isBranch()) {
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if((*P)->getInst()->getOpcode() == V9::BA)
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FinalNodeOrder.push_back(*P);
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else
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otherBranch.push_back(*P);
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branches.push_back(*P);
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}
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else
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new_recurrence.insert(*P);
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@ -833,12 +827,9 @@ void ModuloSchedulingPass::computePartialOrder() {
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}
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if(!found) {
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if(I->first->isBranch()) {
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if(std::find(FinalNodeOrder.begin(), FinalNodeOrder.end(), I->first) == FinalNodeOrder.end())
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if((I->first)->getInst()->getOpcode() == V9::BA)
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FinalNodeOrder.push_back(I->first);
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else
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otherBranch.push_back(I->first);
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}
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if(std::find(branches.begin(), branches.end(), I->first) == branches.end())
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branches.push_back(I->first);
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}
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else
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lastNodes.insert(I->first);
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}
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@ -856,9 +847,13 @@ void ModuloSchedulingPass::computePartialOrder() {
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//partialOrder.push_back(lastNodes);
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//Clean up branches by putting them in final order
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for(std::vector<MSchedGraphNode*>::iterator I = otherBranch.begin(), E = otherBranch.end(); I != E; ++I)
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FinalNodeOrder.push_back(*I);
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std::map<unsigned, MSchedGraphNode*> branchOrder;
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for(std::vector<MSchedGraphNode*>::iterator I = branches.begin(), E = branches.end(); I != E; ++I)
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branchOrder[(*I)->getIndex()] = *I;
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for(std::map<unsigned, MSchedGraphNode*>::reverse_iterator I = branchOrder.rbegin(), E = branchOrder.rend(); I != E; ++I)
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FinalNodeOrder.push_back(I->second);
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}
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@ -1153,7 +1148,11 @@ void ModuloSchedulingPass::computeSchedule() {
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int capII = 30;
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while(!success) {
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int branchES = II - 1;
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int branchLS = II - 1;
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bool lastBranch = true;
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//Loop over the final node order and process each node
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for(std::vector<MSchedGraphNode*>::iterator I = FinalNodeOrder.begin(),
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E = FinalNodeOrder.end(); I != E; ++I) {
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@ -1197,15 +1196,18 @@ void ModuloSchedulingPass::computeSchedule() {
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}
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}
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else {
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//WARNING: HACK! FIXME!!!!
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if((*I)->getInst()->getOpcode() == V9::BA) {
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EarlyStart = II-1;
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LateStart = II-1;
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if(lastBranch) {
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EarlyStart = branchES;
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LateStart = branchLS;
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lastBranch = false;
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--branchES;
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branchLS = 0;
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}
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else {
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EarlyStart = II-2;
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LateStart = 0;
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EarlyStart = branchES;
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LateStart = branchLS;
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assert( (EarlyStart >= 0) && (LateStart >=0) && "EarlyStart and LateStart must be greater then 0");
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--branchES;
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}
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hasPred = 1;
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hasSucc = 1;
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@ -1939,69 +1941,72 @@ void ModuloSchedulingPass::reconstructLoop(MachineBasicBlock *BB) {
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writeEpilogues(epilogues, BB, llvm_epilogues, valuesToSave, newValues, newValLocation, kernelPHIs);
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//Fix our branches
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fixBranches(prologues, llvm_prologues, machineKernelBB, llvmKernelBB, epilogues, llvm_epilogues, BB);
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//Remove phis
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removePHIs(BB, prologues, epilogues, machineKernelBB, newValLocation);
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//Print out epilogues and prologue
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DEBUG(for(std::vector<MachineBasicBlock*>::iterator I = prologues.begin(), E = prologues.end();
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I != E; ++I) {
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std::cerr << "PROLOGUE\n";
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(*I)->print(std::cerr);
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});
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DEBUG(std::cerr << "KERNEL\n");
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DEBUG(machineKernelBB->print(std::cerr));
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DEBUG(for(std::vector<MachineBasicBlock*>::iterator I = epilogues.begin(), E = epilogues.end();
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I != E; ++I) {
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std::cerr << "EPILOGUE\n";
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(*I)->print(std::cerr);
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});
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DEBUG(std::cerr << "New Machine Function" << "\n");
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DEBUG(std::cerr << BB->getParent() << "\n");
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}
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void ModuloSchedulingPass::fixBranches(std::vector<MachineBasicBlock *> &prologues, std::vector<BasicBlock*> &llvm_prologues, MachineBasicBlock *machineKernelBB, BasicBlock *llvmKernelBB, std::vector<MachineBasicBlock *> &epilogues, std::vector<BasicBlock*> &llvm_epilogues, MachineBasicBlock *BB) {
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const TargetInstrInfo *TMI = target.getInstrInfo();
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//Fix up machineBB and llvmBB branches
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//Fix prologue branches
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for(unsigned I = 0; I < prologues.size(); ++I) {
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MachineInstr *branch = 0;
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MachineInstr *branch2 = 0;
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//Find terminator since getFirstTerminator does not work!
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//Find terminator since getFirstTerminator does not work!
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for(MachineBasicBlock::reverse_iterator mInst = prologues[I]->rbegin(), mInstEnd = prologues[I]->rend(); mInst != mInstEnd; ++mInst) {
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MachineOpCode OC = mInst->getOpcode();
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//If its a branch update its branchto
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if(TMI->isBranch(OC)) {
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if(mInst->getOpcode() == V9::BA)
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branch2 = &*mInst;
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else
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branch = &*mInst;
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DEBUG(std::cerr << *mInst << "\n");
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if(branch !=0 && branch2 !=0)
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break;
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for(unsigned opNum = 0; opNum < mInst->getNumOperands(); ++opNum) {
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MachineOperand &mOp = mInst->getOperand(opNum);
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if (mOp.getType() == MachineOperand::MO_PCRelativeDisp) {
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//Check if we are branching to the kernel, if not branch to epilogue
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if(mOp.getVRegValue() == BB->getBasicBlock()) {
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if(I == prologues.size()-1)
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mOp.setValueReg(llvmKernelBB);
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else
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mOp.setValueReg(llvm_prologues[I+1]);
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}
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else {
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mOp.setValueReg(llvm_epilogues[(llvm_epilogues.size()-1-I)]);
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}
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}
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}
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DEBUG(std::cerr << "New Prologue Branch: " << *mInst << "\n");
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}
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}
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//Update branch1
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for(unsigned opNum = 0; opNum < branch->getNumOperands(); ++opNum) {
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MachineOperand &mOp = branch->getOperand(opNum);
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if (mOp.getType() == MachineOperand::MO_PCRelativeDisp) {
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//Check if we are branching to the kernel, if not branch to epilogue
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if(mOp.getVRegValue() == BB->getBasicBlock()) {
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if(I == prologues.size()-1)
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mOp.setValueReg(llvmKernelBB);
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else
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mOp.setValueReg(llvm_prologues[I+1]);
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}
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else
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mOp.setValueReg(llvm_epilogues[(llvm_epilogues.size()-1-I)]);
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}
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}
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//Update branch1
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for(unsigned opNum = 0; opNum < branch2->getNumOperands(); ++opNum) {
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MachineOperand &mOp = branch2->getOperand(opNum);
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if (mOp.getType() == MachineOperand::MO_PCRelativeDisp) {
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//Check if we are branching to the kernel, if not branch to epilogue
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if(mOp.getVRegValue() == BB->getBasicBlock()) {
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if(I == prologues.size()-1)
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mOp.setValueReg(llvmKernelBB);
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else
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mOp.setValueReg(llvm_prologues[I+1]);
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}
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else
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mOp.setValueReg(llvm_epilogues[(llvm_epilogues.size()-1-I)]);
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}
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}
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//Update llvm basic block with our new branch instr
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DEBUG(std::cerr << BB->getBasicBlock()->getTerminator() << "\n");
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const BranchInst *branchVal = dyn_cast<BranchInst>(BB->getBasicBlock()->getTerminator());
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//TmpInstruction *tmp = new TmpInstruction(branchVal->getCondition());
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//Add TmpInstruction to original branches MCFI
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//MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(branchVal);
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//tempMvec.addTemp((Value*) tmp);
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if(I == prologues.size()-1) {
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TerminatorInst *newBranch = new BranchInst(llvmKernelBB,
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llvm_epilogues[(llvm_epilogues.size()-1-I)],
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@ -2014,60 +2019,34 @@ void ModuloSchedulingPass::reconstructLoop(MachineBasicBlock *BB) {
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branchVal->getCondition(),
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llvm_prologues[I]);
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assert(branch != 0 && "There must be a terminator for this machine basic block!\n");
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}
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//Fix up kernel machine branches
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MachineInstr *branch = 0;
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MachineInstr *BAbranch = 0;
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Value *origBranchExit = 0;
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//Fix up kernel machine branches
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for(MachineBasicBlock::reverse_iterator mInst = machineKernelBB->rbegin(), mInstEnd = machineKernelBB->rend(); mInst != mInstEnd; ++mInst) {
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MachineOpCode OC = mInst->getOpcode();
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if(TMI->isBranch(OC)) {
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if(mInst->getOpcode() == V9::BA) {
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BAbranch = &*mInst;
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}
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else {
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branch = &*mInst;
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break;
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for(unsigned opNum = 0; opNum < mInst->getNumOperands(); ++opNum) {
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MachineOperand &mOp = mInst->getOperand(opNum);
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if(mOp.getType() == MachineOperand::MO_PCRelativeDisp) {
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if(mOp.getVRegValue() == BB->getBasicBlock())
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mOp.setValueReg(llvmKernelBB);
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else
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if(llvm_epilogues.size() > 0) {
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assert(origBranchExit == 0 && "There should only be one branch out of the loop");
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origBranchExit = mOp.getVRegValue();
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mOp.setValueReg(llvm_epilogues[0]);
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}
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}
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}
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}
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}
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assert(branch != 0 && "There must be a terminator for the kernel machine basic block!\n");
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//Update kernel self loop branch
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for(unsigned opNum = 0; opNum < branch->getNumOperands(); ++opNum) {
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MachineOperand &mOp = branch->getOperand(opNum);
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if (mOp.getType() == MachineOperand::MO_PCRelativeDisp) {
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mOp.setValueReg(llvmKernelBB);
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}
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}
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Value *origBAVal = 0;
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//Update kernel BA branch
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for(unsigned opNum = 0; opNum < BAbranch->getNumOperands(); ++opNum) {
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MachineOperand &mOp = BAbranch->getOperand(opNum);
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if (mOp.getType() == MachineOperand::MO_PCRelativeDisp) {
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origBAVal = mOp.getVRegValue();
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if(llvm_epilogues.size() > 0)
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mOp.setValueReg(llvm_epilogues[0]);
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}
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}
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assert((origBAVal != 0) && "Could not find original branch always value");
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//Update kernelLLVM branches
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const BranchInst *branchVal = dyn_cast<BranchInst>(BB->getBasicBlock()->getTerminator());
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//TmpInstruction *tmp = new TmpInstruction(branchVal->getCondition());
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//Add TmpInstruction to original branches MCFI
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//MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(branchVal);
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//tempMvec.addTemp((Value*) tmp);
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assert(llvm_epilogues.size() != 0 && "We must have epilogues!");
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@ -2089,7 +2068,7 @@ void ModuloSchedulingPass::reconstructLoop(MachineBasicBlock *BB) {
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}
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else {
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BuildMI(epilogues[I], V9::BA, 1).addPCDisp(origBAVal);
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BuildMI(epilogues[I], V9::BA, 1).addPCDisp(origBranchExit);
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//Update last epilogue exit branch
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@ -2177,29 +2156,6 @@ void ModuloSchedulingPass::reconstructLoop(MachineBasicBlock *BB) {
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}
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}
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removePHIs(BB, prologues, epilogues, machineKernelBB, newValLocation);
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//Print out epilogues and prologue
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DEBUG(for(std::vector<MachineBasicBlock*>::iterator I = prologues.begin(), E = prologues.end();
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I != E; ++I) {
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std::cerr << "PROLOGUE\n";
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(*I)->print(std::cerr);
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});
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DEBUG(std::cerr << "KERNEL\n");
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DEBUG(machineKernelBB->print(std::cerr));
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DEBUG(for(std::vector<MachineBasicBlock*>::iterator I = epilogues.begin(), E = epilogues.end();
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I != E; ++I) {
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std::cerr << "EPILOGUE\n";
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(*I)->print(std::cerr);
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});
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DEBUG(std::cerr << "New Machine Function" << "\n");
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DEBUG(std::cerr << BB->getParent() << "\n");
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//BB->getParent()->getBasicBlockList().erase(BB);
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@ -99,6 +99,8 @@ namespace llvm {
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//void saveValue(const MachineInstr*, const std::set<Value*>&, std::vector<Value*>*);
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void fixBranches(std::vector<MachineBasicBlock *> &prologues, std::vector<BasicBlock*> &llvm_prologues, MachineBasicBlock *machineBB, BasicBlock *llvmBB, std::vector<MachineBasicBlock *> &epilogues, std::vector<BasicBlock*> &llvm_epilogues, MachineBasicBlock*);
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void writePrologues(std::vector<MachineBasicBlock *> &prologues, MachineBasicBlock *origBB, std::vector<BasicBlock*> &llvm_prologues, std::map<const Value*, std::pair<const MSchedGraphNode*, int> > &valuesToSave, std::map<Value*, std::map<int, Value*> > &newValues, std::map<Value*, MachineBasicBlock*> &newValLocation);
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void writeEpilogues(std::vector<MachineBasicBlock *> &epilogues, const MachineBasicBlock *origBB, std::vector<BasicBlock*> &llvm_epilogues, std::map<const Value*, std::pair<const MSchedGraphNode*, int> > &valuesToSave,std::map<Value*, std::map<int, Value*> > &newValues, std::map<Value*, MachineBasicBlock*> &newValLocation, std::map<Value*, std::map<int, Value*> > &kernelPHIs);
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