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Replace (Lower|Upper)caseString in favor of StringRef's newest methods.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143891 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Benjamin Kramer 2011-11-06 20:37:06 +00:00
parent a7b966fc8d
commit 5908536673
11 changed files with 21 additions and 59 deletions
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16
include/llvm/ADT/StringExtras.h
View File

@ -117,22 +117,6 @@ static inline std::string ftostr(const APFloat& V) {
return "<unknown format in ftostr>"; // error
}
static inline std::string LowercaseString(const std::string &S) {
std::string result(S);
for (unsigned i = 0; i < S.length(); ++i)
if (isupper(result[i]))
result[i] = char(tolower(result[i]));
return result;
}
static inline std::string UppercaseString(const std::string &S) {
std::string result(S);
for (unsigned i = 0; i < S.length(); ++i)
if (islower(result[i]))
result[i] = char(toupper(result[i]));
return result;
}
/// StrInStrNoCase - Portable version of strcasestr. Locates the first
/// occurrence of string 's1' in string 's2', ignoring case. Returns
/// the offset of s2 in s1 or npos if s2 cannot be found.

3
lib/MC/SubtargetFeature.cpp
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@ -15,7 +15,6 @@
#include "llvm/Support/Debug.h"
#include "llvm/Support/Format.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/ADT/StringExtras.h"
#include <algorithm>
#include <cassert>
#include <cctype>
@ -115,7 +114,7 @@ void SubtargetFeatures::AddFeature(const StringRef String,
// Don't add empty features
if (!String.empty()) {
// Convert to lowercase, prepend flag and add to vector
Features.push_back(PrependFlag(LowercaseString(String), IsEnabled));
Features.push_back(PrependFlag(String.lower(), IsEnabled));
}
}

7
lib/Target/ARM/ARMAsmPrinter.cpp
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@ -47,7 +47,6 @@
#include "llvm/Target/TargetOptions.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
@ -86,12 +85,12 @@ namespace {
void EmitTextAttribute(unsigned Attribute, StringRef String) {
switch (Attribute) {
case ARMBuildAttrs::CPU_name:
Streamer.EmitRawText(StringRef("\t.cpu ") + LowercaseString(String));
Streamer.EmitRawText(StringRef("\t.cpu ") + String.lower());
break;
/* GAS requires .fpu to be emitted regardless of EABI attribute */
case ARMBuildAttrs::Advanced_SIMD_arch:
case ARMBuildAttrs::VFP_arch:
Streamer.EmitRawText(StringRef("\t.fpu ") + LowercaseString(String));
Streamer.EmitRawText(StringRef("\t.fpu ") + String.lower());
break;
default: assert(0 && "Unsupported Text attribute in ASM Mode"); break;
}
@ -201,7 +200,7 @@ namespace {
Streamer.EmitULEB128IntValue(item.IntValue, 0);
break;
case AttributeItemType::TextAttribute:
Streamer.EmitBytes(UppercaseString(item.StringValue), 0);
Streamer.EmitBytes(item.StringValue.upper(), 0);
Streamer.EmitIntValue(0, 1); // '\0'
break;
default:

7
lib/Target/ARM/AsmParser/ARMAsmLexer.cpp
View File

@ -19,7 +19,6 @@
#include "llvm/ADT/OwningPtr.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/ADT/StringSwitch.h"
#include <string>
@ -107,11 +106,9 @@ AsmToken ARMBaseAsmLexer::LexTokenUAL() {
SetError(Lexer->getErrLoc(), Lexer->getErr());
break;
case AsmToken::Identifier: {
std::string upperCase = lexedToken.getString().str();
std::string lowerCase = LowercaseString(upperCase);
StringRef lowerRef(lowerCase);
std::string lowerCase = lexedToken.getString().lower();
unsigned regID = MatchRegisterName(lowerRef);
unsigned regID = MatchRegisterName(lowerCase);
// Check for register aliases.
// r13 -> sp
// r14 -> lr

13
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
View File

@ -30,7 +30,6 @@
#include "llvm/ADT/OwningPtr.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/ADT/StringSwitch.h"
#include "llvm/ADT/Twine.h"
@ -2063,8 +2062,7 @@ int ARMAsmParser::tryParseRegister() {
// FIXME: Validate register for the current architecture; we have to do
// validation later, so maybe there is no need for this here.
std::string upperCase = Tok.getString().str();
std::string lowerCase = LowercaseString(upperCase);
std::string lowerCase = Tok.getString().lower();
unsigned RegNum = MatchRegisterName(lowerCase);
if (!RegNum) {
RegNum = StringSwitch<unsigned>(lowerCase)
@ -2092,8 +2090,7 @@ int ARMAsmParser::tryParseShiftRegister(
const AsmToken &Tok = Parser.getTok();
assert(Tok.is(AsmToken::Identifier) && "Token is not an Identifier");
std::string upperCase = Tok.getString().str();
std::string lowerCase = LowercaseString(upperCase);
std::string lowerCase = Tok.getString().lower();
ARM_AM::ShiftOpc ShiftTy = StringSwitch<ARM_AM::ShiftOpc>(lowerCase)
.Case("lsl", ARM_AM::lsl)
.Case("lsr", ARM_AM::lsr)
@ -2688,7 +2685,7 @@ parseMSRMaskOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
// Split spec_reg from flag, example: CPSR_sxf => "CPSR" and "sxf"
size_t Start = 0, Next = Mask.find('_');
StringRef Flags = "";
std::string SpecReg = LowercaseString(Mask.slice(Start, Next));
std::string SpecReg = Mask.slice(Start, Next).lower();
if (Next != StringRef::npos)
Flags = Mask.slice(Next+1, Mask.size());
@ -2756,8 +2753,8 @@ parsePKHImm(SmallVectorImpl<MCParsedAsmOperand*> &Operands, StringRef Op,
return MatchOperand_ParseFail;
}
StringRef ShiftName = Tok.getString();
std::string LowerOp = LowercaseString(Op);
std::string UpperOp = UppercaseString(Op);
std::string LowerOp = Op.lower();
std::string UpperOp = Op.upper();
if (ShiftName != LowerOp && ShiftName != UpperOp) {
Error(Parser.getTok().getLoc(), Op + " operand expected.");
return MatchOperand_ParseFail;

7
lib/Target/MBlaze/AsmParser/MBlazeAsmLexer.cpp
View File

@ -11,7 +11,6 @@
#include "llvm/ADT/OwningPtr.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCParser/MCAsmLexer.h"
@ -100,11 +99,7 @@ AsmToken MBlazeBaseAsmLexer::LexTokenUAL() {
return AsmToken(lexedToken);
case AsmToken::Identifier:
{
std::string upperCase = lexedToken.getString().str();
std::string lowerCase = LowercaseString(upperCase);
StringRef lowerRef(lowerCase);
unsigned regID = MatchRegisterName(lowerRef);
unsigned regID = MatchRegisterName(lexedToken.getString().lower());
if (regID) {
return AsmToken(AsmToken::Register,

3
lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp
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@ -17,7 +17,6 @@
#include "llvm/MC/MCInst.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/ADT/StringExtras.h"
using namespace llvm;
#define GET_INSTRUCTION_NAME
@ -66,7 +65,7 @@ StringRef MipsInstPrinter::getOpcodeName(unsigned Opcode) const {
}
void MipsInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
OS << '$' << LowercaseString(getRegisterName(RegNo));
OS << '$' << StringRef(getRegisterName(RegNo)).lower();
}
void MipsInstPrinter::printInst(const MCInst *MI, raw_ostream &O,

9
lib/Target/Mips/MipsAsmPrinter.cpp
View File

@ -36,7 +36,6 @@
#include "llvm/Target/TargetLoweringObjectFile.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/ADT/Twine.h"
#include "llvm/Support/TargetRegistry.h"
#include "llvm/Support/raw_ostream.h"
@ -177,7 +176,7 @@ void MipsAsmPrinter::printSavedRegsBitmask(raw_ostream &O) {
void MipsAsmPrinter::printHex32(unsigned Value, raw_ostream &O) {
O << "0x";
for (int i = 7; i >= 0; i--)
O << utohexstr((Value & (0xF << (i*4))) >> (i*4));
O.write_hex((Value & (0xF << (i*4))) >> (i*4));
}
//===----------------------------------------------------------------------===//
@ -193,9 +192,9 @@ void MipsAsmPrinter::emitFrameDirective() {
unsigned stackSize = MF->getFrameInfo()->getStackSize();
OutStreamer.EmitRawText("\t.frame\t$" +
Twine(LowercaseString(MipsInstPrinter::getRegisterName(stackReg))) +
StringRef(MipsInstPrinter::getRegisterName(stackReg)).lower() +
"," + Twine(stackSize) + ",$" +
Twine(LowercaseString(MipsInstPrinter::getRegisterName(returnReg))));
StringRef(MipsInstPrinter::getRegisterName(returnReg)).lower());
}
/// Emit Set directives.
@ -335,7 +334,7 @@ void MipsAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
switch (MO.getType()) {
case MachineOperand::MO_Register:
O << '$'
<< LowercaseString(MipsInstPrinter::getRegisterName(MO.getReg()));
<< StringRef(MipsInstPrinter::getRegisterName(MO.getReg())).lower();
break;
case MachineOperand::MO_Immediate:

5
lib/Target/Sparc/SparcAsmPrinter.cpp
View File

@ -23,7 +23,6 @@
#include "llvm/MC/MCSymbol.h"
#include "llvm/Target/Mangler.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/Support/TargetRegistry.h"
#include "llvm/Support/raw_ostream.h"
using namespace llvm;
@ -82,7 +81,7 @@ void SparcAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
}
switch (MO.getType()) {
case MachineOperand::MO_Register:
O << "%" << LowercaseString(getRegisterName(MO.getReg()));
O << "%" << StringRef(getRegisterName(MO.getReg())).lower();
break;
case MachineOperand::MO_Immediate:
@ -147,7 +146,7 @@ bool SparcAsmPrinter::printGetPCX(const MachineInstr *MI, unsigned opNum,
"Operand is not a physical register ");
assert(MO.getReg() != SP::O7 &&
"%o7 is assigned as destination for getpcx!");
operand = "%" + LowercaseString(getRegisterName(MO.getReg()));
operand = "%" + StringRef(getRegisterName(MO.getReg())).lower();
break;
}

7
lib/Target/X86/AsmParser/X86AsmLexer.cpp
View File

@ -14,7 +14,6 @@
#include "llvm/MC/MCTargetAsmLexer.h"
#include "llvm/Support/TargetRegistry.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringExtras.h"
using namespace llvm;
@ -144,11 +143,7 @@ AsmToken X86AsmLexer::LexTokenIntel() {
SetError(Lexer->getErrLoc(), Lexer->getErr());
return lexedToken;
case AsmToken::Identifier: {
std::string upperCase = lexedToken.getString().str();
std::string lowerCase = LowercaseString(upperCase);
StringRef lowerRef(lowerCase);
unsigned regID = MatchRegisterName(lowerRef);
unsigned regID = MatchRegisterName(lexedToken.getString().lower());
if (regID)
return AsmToken(AsmToken::Register,

3
lib/Target/X86/AsmParser/X86AsmParser.cpp
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@ -20,7 +20,6 @@
#include "llvm/ADT/OwningPtr.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/ADT/StringSwitch.h"
#include "llvm/ADT/Twine.h"
#include "llvm/Support/SourceMgr.h"
@ -412,7 +411,7 @@ bool X86ATTAsmParser::ParseRegister(unsigned &RegNo,
// If the match failed, try the register name as lowercase.
if (RegNo == 0)
RegNo = MatchRegisterName(LowercaseString(Tok.getString()));
RegNo = MatchRegisterName(Tok.getString().lower());
if (!is64BitMode()) {
// FIXME: This should be done using Requires<In32BitMode> and